H8SLASH3003 datasheet(276/715 Pages) RENESAS

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Port 9 Data Direction Register (P9DDR): P9DDR is an 8-bit write-only register that can select

input or output for each pin in port 9.

A pin in port 9 becomes an output pin if the corresponding P9DDR bit is set to 1, and an input pin

if this bit is cleared to 0.

P9DDR is a write-only register. Its value cannot be read. All bits return 1 when read.

P9DDR is initialized to H'C0 by a reset and in hardware standby mode. In software standby mode

it retains its previous setting, so if a P9DDR bit is set to 1, the corresponding pin maintains its

output state in software standby mode.

Port 9 Data Register (P9DR): P9DR is an 8-bit readable/writable register that stores data for pins

P95 to P90.

When a bit in P9DDR is set to 1, if port 9 is read the value of the corresponding P9DR bit is

returned directly. When a bit in P9DDR is cleared to 0, if port 9 is read the corresponding pin level

is read.

Bits 7 and 6 are reserved. They cannot be modified and always read 1.

P9DR is initialized to H'C0 by a reset and in hardware standby mode. In software standby mode it

retains its previous setting.

Bit

Initial value

Read/Write

—

P9 DDR

Reserved bits

Port 9 data direction 5 to 0

These bits select input or

output for port 9 pins

Bit

Initial value

Read/Write

—

R/W

Reserved bits

Port 9 data 5 to 0

These bits store data

for port 9 pins

258

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