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H8/3028F 数据表(PDF) 189 Page - Renesas Technology Corp |
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H8/3028F 数据表(HTML) 189 Page - Renesas Technology Corp |
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189 / 923 page ![]() Rev. 2.00, 09/03, page 159 of 890 Table 6.9 Correspondence between Settings of MXC1 and MXC0 Bits and ABWCR, and Row Address Compared in Burst Access DRCRB ABWCR Operating Mode MXC1 MXC0 ABWn Bus Width Compared Row Address Modes 1 and 2 0 0 0 16 bits A19 to A9 (1-Mbyte) 18 bits A19 to A8 1 0 16 bits A19 to A10 18 bits A19 to A9 10 0 16 bits A19 to A11 18 bits A19 to A10 1 — — Illegal setting Modes 3, 4, and 5 0 0 0 16 bits A23 to A9 (16-Mbyte) 18 bits A23 to A8 1 0 16 bits A23 to A10 18 bits A23 to A9 10 0 16 bits A23 to A11 18 bits A23 to A10 1 — — Illegal setting Note: n = 2 to 5 |
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