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AT89C5122D-RDRUM 数据表(PDF) 144 Page - ATMEL Corporation |
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AT89C5122D-RDRUM 数据表(HTML) 144 Page - ATMEL Corporation |
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144 / 208 page  144 AT83R5122, AT8xC5122/23 4202F–SCR–07/2008 Serial Peripheral DATa Register (SPDAT) The Serial Peripheral Data Register (Table 87) is a read/write buffer for the receive data register. A write to SPDAT places data directly into the shift register. No transmit buffer is available in this model. A read of the SPDAT returns the value located in the receive buffer and not the content of the shift register. Reset Value = XXXX XXXXb Table 87. Serial Peripheral Data Register - SPDAT (C5h) 7654 3210 R7 R6 R5 R4 R3 R2 R1 R0 Bit Number Bit Mnemonic Description 7-0 R7:0 Receive data bits SPCON, SPSTA and SPDAT registers may be read and written at any time while there is no on-going exchange. However, special care should be taken when writing to them while a transmission is on-going: Do not change SPR2, SPR1 and SPR0 Do not change CPHA and CPOL Do not change MSTR Clearing SPEN would immediately disable the peripheral Writing to the SPDAT will cause an overflow |
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