AT89C5122D-RDRUM datasheet(143/208 Pages) ATMEL

143 / 208 page

143

AT83R5122, AT8xC5122/23

4202F–SCR–07/2008

Serial Peripheral Status Register

(SPSTA)

The

Serial Peripheral Status Register contains flags to signal the following

conditions:

•

Data transfer complete

•

Write collision

•

Inconsistent logic level on SS pin (mode fault error)

Reset Value = 00X0XXXXb

Table 86.

Serial Peripheral Status and Control Register - SPSTA (C4h)

7654

3210

SPIF

WCOL

SSERR

MODF

Bit

Number

Bit

Mnemonic

R/W

Mode

Description

7SPIF

Serial Peripheral data transfer flag

Clear by hardware to indicate data transfer is in progress or has been

approved by a clearing sequence.

Set by hardware to indicate that the data transfer has been completed.

6WCOL

Write Collision flag

Cleared by hardware to indicate that no collision has occurred or has

been approved by a clearing sequence.

Set by hardware to indicate that a collision has been detected.

SSERR

Synchronous Serial Slave Error flag

Set by hardware when SS is modified before the end of a received data.

Cleared by disabling the SPI (clearing SPEN bit in SPCON).

4MODF

Mode Fault

Cleared by hardware to indicate that the SS pin is at appropriate logic

level, or has been approved by a clearing sequence.

Set by hardware to indicate that the SS pin is at inappropriate logic level

3 - 0

Reserved

The value read from this bit is indeterminate. Do not change these bits.

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