| 数据搜索系统,热门电子元器件搜索 |
|
EM357-RTR 数据表(PDF) 166 Page - List of Unclassifed Manufacturers |
|
|
|||||||||||||||||||||||||||||
EM357-RTR 数据表(HTML) 166 Page - List of Unclassifed Manufacturers |
|
166 / 240 page ![]() EM351 / EM357 TIMx_ARR TIM1_ARR Timer 1 Auto-Reload Register Address: 0x4000E02C Reset: 0xFFFF TIM2_ARR Timer 2 Auto-Reload Register Address: 0x4000F02C Reset: 0xFFFF 31 30 29 28 27 26 25 24 0 0 0 0 0 0 0 0 23 22 21 20 19 18 17 16 0 0 0 0 0 0 0 0 15 14 13 12 11 10 9 8 TIM_ARR 7 6 5 4 3 2 1 0 TIM_ARR Bitname Bitfield Access Description TIM_ARR [15:0] RW TIM_ARR is the value to be loaded in the shadow auto-reload register. The auto-reload register is buffered. Writing or reading the auto-reload register accesses the buffer register. The content of the buffer register is transfered in the shadow register permanently or at each UEV, depending on the auto-reload buffer enable bit (TIM_ARBE) in TMRx_CR1 register. The UEV is sent when the counter reaches the overflow point (or underflow point when down-counting) and if the TIM_UDIS bit equals 0 in the TMRx_CR1 register. It can also be generated by software. The counter is blocked while the auto- reload value is 0. 9-46 120-035X-000D Preliminary |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |