430 datasheet(14/71 Pages) INTEL

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Low Power Features

Datasheet

deassertion (AC Specification T45). When re-entering the Stop-Grant state from the

Sleep state, STPCLK# should be deasserted ten or more bus clocks after the

deassertion of SLP# (AC Specification T75).

While in the Stop-Grant State, the processor will service snoops and latch interrupts

delivered on the FSB. The processor will latch SMI#, INIT#, LINT[1:0] interrupts and

will serviced only upon return to the Normal state.

While in Stop-Grant state, the processor will process snoops on the FSB and it will latch

interrupts delivered on the FSB.

The PBE# signal may be driven when the processor is in Stop-Grant state. PBE# will be

asserted if there is any pending interrupt or monitor event latched within the processor.

Pending interrupts that are blocked by the EFLAGS.IF bit being clear will still cause

assertion of PBE#. Assertion of PBE# indicates to system logic that the processor

should return to the Normal state.

A transition to the Stop Grant Snoop state will occur when the processor detects a

snoop on the FSB (see Section 2.1.2.3). A transition to the Sleep state (see

Section 2.1.2.4) will occur with the assertion of the SLP# signal.

2.1.2.3

Stop Grant Snoop State

The processor will respond to snoop or interrupt transactions on the FSB while in Stop-

Grant state by entering the Stop-Grant Snoop state. The processor will stay in this

state until the snoop on the FSB has been serviced (whether by the processor or

another agent on the FSB) or the interrupt has been latched. The processor will return

to the Stop-Grant state once the snoop has been serviced or the interrupt has been

latched.

2.1.2.4

Sleep State

The Sleep state is a low power state in which the processor maintains its context,

maintains the phase-locked loop (PLL), and stops all internal clocks. The Sleep state is

entered through assertion of the SLP# signal while in the Stop-Grant state. The SLP#

pin should only be asserted when the processor is in the Stop-Grant state. SLP#

assertions while the processor is not in the Stop-Grant state is out of specification and

may result in unapproved operation.

In the Sleep state, the processor is incapable of responding to snoop transactions or

latching interrupt signals. No transitions or assertions of signals (with the exception of

SLP#, DPSLP# or RESET#) are allowed on the FSB while the processor is in Sleep

state. Snoop events that occur while in Sleep state or during a transition into or out of

Sleep state will cause unpredictable behavior. Any transition on an input signal before

the processor has returned to the Stop-Grant state will result in unpredictable behavior.

If RESET# is driven active while the processor is in the Sleep state, and held active as

specified in the RESET# pin specification, then the processor will reset itself, ignoring

the transition through Stop-Grant State. If RESET# is driven active while the processor

is in the Sleep State, the SLP# and STPCLK# signals should be deasserted immediately

after RESET# is asserted to ensure the processor correctly executes the Reset

sequence.

While in the Sleep state, the processor is capable of entering an even lower power

state, the Deep Sleep state, by asserting the DPSLP# pin. (See Section 2.1.2.5.) While

the processor is in the Sleep state, the SLP# pin must be deasserted if another

asynchronous FSB event needs to occur.

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