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430 数据表(PDF) 29 Page - Intel Corporation |
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430 数据表(HTML) 29 Page - Intel Corporation |
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29 / 71 page ![]() Datasheet 29 Electrical Specifications NOTES: 1. Unless otherwise noted, all specifications in this table apply to all processor frequencies. 2. Crossing Voltage is defined as absolute voltage where rising edge of BCLK0 is equal to the falling edge of BCLK1. 3. Threshold Region is defined as a region entered about the crossing voltage in which the differential receiver switches. It includes input threshold hysteresis. 4. For Vin between 0 V and VIH. 5. Cpad includes die capacitance only. No package parasitics are included. 6. ΔV CROSS is defined as the total variation of all crossing voltages as defined in note 2. NOTES: 1. Unless otherwise noted, all specifications in this table apply to all processor frequencies. 2. VIL is defined as the maximum voltage level at a receiving agent that will be interpreted as a logical low value. 3. VIH is defined as the minimum voltage level at a receiving agent that will be interpreted as a logical high value. 4. VIH and VOH may experience excursions above VCCP. However, input signal drivers must comply with the signal quality specifications. 5. This is the pull down driver resistance. Refer to processor I/O Buffer Models for I/V characteristics. Measured at 0.31*VCCP. RON (min) = 0.38*RTT, RON (typ) = 0.45*RTT, RON (max) = 0.52*R TT . 6. GTLREF should be generated from VCCP with a 1% tolerance resistor divider. Tolerance of resistor divider decides the tolerance of GTLREF. The VCCP referred to in these specifications is the instantaneous VCCP. 7. RTT is the on-die termination resistance measured at VOL of the AGTL+ output driver. Measured at 0.31*VCCP. RTT is connected to VCCP on die. Refer to processor I/O buffer models for I/V characteristics. 8. Specified with on die RTT and RON are turned off. 9. Cpad includes die capacitance only. No package parasitics are included. 10. This spec applies to all AGTL+ signals except for PREQ#. RTT for PREQ# is between 1.5 kΩ to 6.0 kΩ. Table 8. FSB Differential BCLK Specifications Symbol Parameter Min Typ Max Unit Notes1 VIL Input Low Voltage 0 V VIH Input High Voltage 0.660 0.710 0.85 V V CROSS Crossing Voltage 0.25 0.35 0.55 V 2 ΔV CROSS Range of Crossing Points 0.14 V 6 VTH Threshold Region VCROSS -0.100 VCROSS+0.100 V 3 ILI Input Leakage Current ±100 µA 4 Cpad Pad Capacitance 0.95 1.2 1.45 pF 5 Table 9. AGTL+ Signal Group DC Specifications Symbol Parameter Min Typ Max Unit Notes1 VCCP I/O Voltage 0.997 1.05 1.102 V GTLREF Reference Voltage 2/3 VCCP V6 VIH Input High Voltage GTLREF+0.1 VCCP+0.1 V 3,6 VIL Input Low Voltage -0.1 0 GTLREF-0.1 V 2,4 VOH Output High Voltage VCCP 6 RTT Termination Resistance 50 55 61 Ω 7,10 RON Buffer on Resistance 22.3 25.5 28.7 Ω 5 ILI Input Leakage Current ±100 µA 8 Cpad1 Pad Capacitance 1.8 2.3 2.75 pF 9 |
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