| 数据搜索系统,热门电子元器件搜索 |
|
ADP1046AACPZ-R7 数据表(PDF) 62 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADP1046AACPZ-R7 数据表(HTML) 62 Page - Analog Devices |
|
62 / 88 page ![]() ADP1046A Data Sheet Rev. 0 | Page 62 of 88 Table 59. Register 0x3B—Light Load Mode Disable Settings Bits Bit Name R/W Description 7 Disable OUTAUX R/W Setting this bit means that OUTAUX is also disabled if the load current falls below the light load SR disable threshold. 6 Disable OUTD R/W Setting this bit means that OUTD is also disabled if the load current falls below the light load SR disable threshold. 5 Disable OUTC R/W Setting this bit means that OUTC is also disabled if the load current falls below the light load SR disable threshold. 4 Disable OUTB R/W Setting this bit means that OUTB is also disabled if the load current falls below the light load SR disable threshold. 3 Disable OUTA R/W Setting this bit means that OUTA is also disabled if the load current falls below the light load SR disable threshold. [2:0] Light load SR disable R/W These bits set the load current limit on the CS2 ADC below which the synchronous rectifier outputs (SR1 and SR2) are disabled. This value also determines the point at which the power supply goes into light load mode and the light load mode filter is used. This value is programmable as a percentage of the CS2 ADC full scale (either 60 mV or 120 mV). The hysteresis and the averaging speed are programmable in Register 0x7D. Light Load Threshold as % of Full Scale Bit 2 Bit 1 Bit 0 37.5 µs 75 µs 150 µs 300 µs 0 0 0 0% 0% 0% 0% 0 0 1 7.81% 3.91% 1.95% 0.98% 0 1 0 15.63% 7.81% 3.91% 1.95% 0 1 1 23.44% 11.72% 5.86% 2.93% 1 0 0 31.25% 15.63% 7.81% 3.91% 1 0 1 39.06% 19.53% 9.77% 4.88% 1 1 0 46.88% 23.44% 11.72% 5.86% 1 1 1 54.69% 27.34% 13.67% 6.84% ID REGISTERS Table 60. Register 0x3C—Silicon Revision ID Bits Bit Name R/W Description [7:0] Silicon revision R This register contains the manufacturer’s silicon revision code for the device. This value is used by the manufacturer for tracking purposes. Table 61. Register 0x3D—Manufacturer ID Bits Bit Name R/W Description [7:0] Manufacturer ID code R This register contains the manufacturer’s ID code for the device. It is used by the manufacturer for test purposes and should not be read from in normal operation. This value is hardwired to 0x41 to represent the Analog Devices ID code. Table 62. Register 0x3E—Device ID Bits Bit Name R/W Description [7:0] Device ID code R This register contains the ID code for the device. This value is hardwired to 0x46 to represent the ADP1046A. |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |