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ADP1046AACPZ-R7 数据表(PDF) 87 Page - Analog Devices |
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ADP1046AACPZ-R7 数据表(HTML) 87 Page - Analog Devices |
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87 / 88 page  Data Sheet ADP1046A Rev. 0 | Page 87 of 88 Table 158. Register 0x4F—OUTD Falling Edge Dead Time in Resonant Mode Bits Bit Name R/W Description [7:0] Δt 8 (falling edge dead time of OUTD) R/W This register sets Δt 8, which is the leading time of the falling edge of OUTD from the end of the switching cycle, t C. Each LSB corresponds to 5 ns of resolution. Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Δt 8 (ns) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 5 … … … … … … … … … 1 1 1 1 1 1 1 1 1275 Table 159. Register 0x51—SR1 Rising Edge Dead Time in Resonant Mode Bits Bit Name R/W Description [7:0] Δt 9 (rising edge dead time of SR1) R/W This register sets Δt 9, which is the delay time of the rising edge of SR1 from the ACSNS rising edge, t D. Each LSB corresponds to 5 ns of resolution. Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Δt 9 (ns) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 5 … … … … … … … … … 1 1 1 1 1 1 1 1 1275 Table 160. Register 0x53—SR1 Falling Edge Dead Time in Resonant Mode Bits Bit Name R/W Description [7:0] Δt 10 (falling edge dead time of SR1) R/W This register sets Δt 10, which is the leading time of the falling edge of SR1 from the ACSNS falling edge, t E. Each LSB corresponds to 5 ns of resolution. Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Δt10 (ns) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 5 … … … … … … … … … 1 1 1 1 1 1 1 1 1275 Table 161. Register 0x55—SR2 Rising Edge Dead Time in Resonant Mode Bits Bit Name R/W Description [7:0] Δt 11 (rising edge dead time of SR2) R/W This register sets Δt 11, which is the delay time of the rising edge of SR2 from the ACSNS falling edge, t E. Each LSB corresponds to 5 ns of resolution. Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Δt 11 (ns) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 5 … … … … … … … … … 1 1 1 1 1 1 1 1 1275 Table 162. Register 0x57—SR2 Falling Edge Dead Time in Resonant Mode Bits Bit Name R/W Description [7:0] Δt 12 (falling edge dead time of SR2) R/W This register sets Δt 12, which is the leading time of the falling edge of SR2 from the ACSNS rising edge, t F. Each LSB corresponds to 5 ns of resolution. Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Δt 12 (ns) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 5 … … … … … … … … … 1 1 1 1 1 1 1 1 1275 |
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