MPC8358ECVVADDGA datasheet(11/102 Pages) FREESCALE

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MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 5

Freescale Semiconductor

Power Sequencing

This figure shows the undershoot and overshoot voltage of the PCI interface of the device for the 3.3-V signals, respectively.

Figure 4. Maximum AC Waveforms on PCI interface for 3.3-V Signaling

2.1.3

Output Driver Characteristics

This table provides information on the characteristics of the output driver strengths. The values are preliminary estimates.

2.2

Power Sequencing

This section details the power sequencing considerations for the MPC8360E/58E.

Table 3. Output Drive Capability

Driver Type

Output Impedance (

Ω)

Supply Voltage

Local bus interface utilities signals

OVDD = 3.3 V

PCI signals

PCI output clocks (including PCI_SYNC_OUT)

DDR signal

36 (half-strength mode)1

GVDD = 2.5 V

DDR2 signal

36 (half-strength mode)1

GVDD = 1.8 V

10/100/1000 Ethernet signals

LVDD = 2.5/3.3 V

DUART, system control, I2C, SPI, JTAG

OVDD = 3.3 V

GPIO signals

OVDD = 3.3 V

LVDD = 2.5/3.3 V

Note:

1. DDR output impedance values for half strength mode are verified by design and not tested.

Undervoltage

Waveform

Overvoltage

Waveform

11 ns

(Min)

+7.1 V

7.1 V p-to-p

(Min)

4 ns

(Max)

–3.5 V

7.1 V p-to-p

(Min)

62.5 ns

+3.6 V

0 V

4 ns

(Max)

MPC8358ECVVADDGA 数据表(PDF) 11 Page - Freescale Semiconductor, Inc

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