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MPC8358ECVVADDGA 数据表(PDF) 19 Page - Freescale Semiconductor, Inc |
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MPC8358ECVVADDGA 数据表(HTML) 19 Page - Freescale Semiconductor, Inc |
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19 / 102 page ![]() MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 5 Freescale Semiconductor 19 DDR and DDR2 SDRAM DC Electrical Characteristics 6.1 DDR and DDR2 SDRAM DC Electrical Characteristics This table provides the recommended operating conditions for the DDR2 SDRAM component(s) of the device when GVDD(typ) = 1.8 V. This table provides the DDR2 capacitance when GVDD(typ) = 1.8 V. This table provides the recommended operating conditions for the DDR SDRAM component(s) of the device when GVDD(typ) = 2.5 V. Table 14. DDR2 SDRAM DC Electrical Characteristics for GVDD(typ) = 1.8 V Parameter/Condition Symbol Min Max Unit Notes I/O supply voltage GVDD 1.71 1.89 V 1 I/O reference voltage MVREF 0.49 × GVDD 0.51 × GVDD V 2 I/O termination voltage VTT MVREF – 0.04 MVREF + 0.04 V 3 Input high voltage VIH MVREF + 0.125 GVDD + 0.3 V — Input low voltage VIL –0.3 MVREF – 0.125 V — Output leakage current IOZ —±10 μA 4 Output high current (VOUT = 1.420 V) IOH –13.4 — mA — Output low current (VOUT = 0.280 V) IOL 13.4 — mA — MVREF input leakage current IVREF —±10 μA— Input current (0 V ≤VIN ≤OVDD)IIN —±10 μA— Notes: 1. GVDD is expected to be within 50 mV of the DRAM GVDD at all times. 2. MVREF is expected to equal 0.5 × GVDD, and to track GVDD DC variations as measured at the receiver. Peak-to-peak noise on MVREF cannot exceed ±2% of the DC value. 3. VTT is not applied directly to the device. It is the supply to which far end signal termination is made and is expected to equal MVREF. This rail should track variations in the DC level of MVREF. 4. Output leakage is measured with all outputs disabled, 0 V ≤V OUT ≤GVDD. Table 15. DDR2 SDRAM Capacitance for GVDD(typ)=1.8 V Parameter/Condition Symbol Min Max Unit Notes Input/output capacitance: DQ, DQS, DQS CIO 68 pF 1 Delta input/output capacitance: DQ, DQS, DQS CDIO —0.5 pF 1 Note: 1. This parameter is sampled. GVDD = 1.8 V ± 0.090 V, f = 1 MHz, TA = 25°C, VOUT = GVDD/2, VOUT (peak-to-peak) = 0.2 V. Table 16. DDR SDRAM DC Electrical Characteristics for GVDD(typ) = 2.5 V Parameter/Condition Symbol Min Max Unit Notes I/O supply voltage GVDD 2.375 2.625 V 1 I/O reference voltage MVREF 0.49 × GVDD 0.51 × GVDD V 2 I/O termination voltage VTT MVREF – 0.04 MVREF + 0.04 V 3 |
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