AM79C978VCSLASHW datasheet(190/261 Pages) AMD

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Am79C978

TBR1: 10BASE-T Status Register (Register 1)

The Status Register identifies the physical and Auto-

negotiation capabilities of the local PHY. This register is

read only; a write will have no effect.

Table 66.

TBR1: 10BASE-T PHY Status Register (Register 1)

Note:

1. LH = Latching High, LL = Latching Low.

Bits

Name

Description

Read/Write

(Note 1)

Default

Value

100BASE-T4

1 = 100BASE-T4 able,

0 = not 100BASE-T4 able

100BASE-X Full-Duplex

1 = 100BASE-X full-duplex able,

0 = not 100BASE-X full-duplex able

100BASE-X Half-Duplex

1 = 100BASE-X half-duplex able,

0 = not 100BASE-X half-duplex able

10 Mbps Full-Duplex

1 = 10 Mbps full-duplex able,

0 = not 10 Mbps full-duplex able

10 Mbps Half-Duplex

1 = 10 Mbps half-duplex able,

0 = not 10 Mbps half-duplex able

10-7

Reserved

Ignore when read

MF Preamble Suppression

1 = PHY can accept management (mgmt)

frames with or without preamble, 0 = PHY

can only accept mgmt frames with

preamble

Auto-Negotiation Complete

1 = Auto-Negotiation completed,

0 = Auto-Negotiation not completed

Remote Fault

1 = remote fault detected,

0 = no remote fault detected

RO, LH

Auto-Negotiation Ability

1 = PHY able to auto-negotiate,

0 = PHY not able to auto-negotiate

2Link Status

1 = link is up,

0 = link is down

RO, LL

Jabber Detect

1 = jabber condition detected,

0 = no jabber condition detected

Extended Capability

1 = extended register capabilities,

0 = basic register set capabilities only

AM79C978VC/W 数据表(PDF) 190 Page - Advanced Micro Devices

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