AR0330 datasheet(20/77 Pages) ONSEMI

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AR0330_DS Rev. U Pub. 4/15 EN

©Semiconductor Components Industries, LLC,2015.

AR0330: 1/3-Inch CMOS Digital Image Sensor

Electrical Characteristics

Two-Wire Serial Register Interface

The electrical characteristics of the two-wire serial register interface (SCLK, SDATA) are

shown in Figure 8 and Table 14.

Figure 8:

Two-Wire Serial Bus Timing Parameters

Note:

Read sequence: For an 8-bit READ, read waveforms start after WRITE command and register

address are issued.

Notes:

1. This table is based on I2C standard (v2.1 January 2000). Philips Semiconductor.

2. Two-wire control is I2C-compatible.

3. All values referred to VIHmin = 0.9 VDD and VILmax = 0.1VDD levels. Sensor EXCLK = 27 MHz.

Table 14:

Two-Wire Serial Bus Characteristics

fEXTCLK = 27 MHz; VDD = 1.8V; VDD_IO = 2.8V; VAA = 2.8V; VAA_PIX = 2.8V;

VDD_PLL = 2.8V; TA = 25°C

Parameter

Symbol

Standard Mode

Fast Mode

Unit

Min

Max

Min

Max

SCLK Clock Frequency

fSCL

100

400

KHz

Hold time (repeated) START condition

After this period, the first clock pulse is

generated

tHD;STA

4.0

0.6

s

LOW period of the SCLK clock

tLOW

4.7

1.3

s

HIGH period of the SCLK clock

tHIGH

4.0

0.6

s

Set-up time for a repeated START

condition

tSU;STA

4.7

0.6

s

Data hold time

tHD;DAT

3.455

0.95

s

Data set-up time

tSU;DAT

250

1006

-ns

Rise time of both SDATA and SCLK signals

1000

20 + 0.1Cb7

300

Fall time of both SDATA and SCLK signals

300

20 + 0.1Cb7

300

Set-up time for STOP condition

tSU;STO

4.0

0.6

s

Bus free time between a STOP and START

condition

tBUF

4.7

1.3

s

Capacitive load for each bus line

400

Serial interface input pin capacitance

CIN_SI

3.3

SDATA max load capacitance

CLOAD_SD

SDATA pull-up resistor

RSD

1.5

4.7

1.5

4.7

K

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