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ADE3700 数据表(PDF) 68 Page - STMicroelectronics

部件名 ADE3700
功能描述  Analog LCD Display Engine for XGA and SXGA Resolutions
PDF  89 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ADE3700 数据表(HTML) 68 Page - STMicroelectronics

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Flicker
ADE3700
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2.16
Flicker
The Flicker block computes correlations of the image data with potential inversion patterns of the
LCD which in turn allows the microcontroller to modify the polarity signal to cancel large areas of
flicker. This function is only useful in SmartPanel applications.
The incoming image is scored against 8 vertical Walsh functions. All patterns are considered
vertically, while horizontally the pixels are assumed to be alternating RGB components.
The scores (0 to 7) are 32-bit unsigned quantities that reflect the correlation of the programmed
window area with the 8 Walsh functions.
The horizontal inversion of the LCD drivers must be programmed into FLICKER_CTRL0[2:0]. The
most common setting is +-+ or -+- (RGB).
A calculation is completed after the number of frames programmed into the FRAME_CNT_MAX
register (0xCA03). With each frame the calculation is performed on only a vertical strip. The width of
that strip (in pixels) is determined by the value programmed in the HBLOCK_SIZE register
(0xCA02) with the following relation: strip width = 2 ^ (3 + HBLOCK_SIZE).
The free_run/freeze_scores bit (FLICKER_CTRL0[4]) enables the final calculation to be captured
easily by the MCU. The internal flicker calculation continues to run -- only the update of the I2C
registers is blocked when this bit is set to prevent corruption during readout.
0 to 14
30
[7:3]
Reserved
[2]
MSB of background color for the row
[1]
double high enable for the row
[0]
double wide enable for the row
0 to 14
0 to 29
[7:5]
3 LSBs of background color for 1bpp chars
no function for 4bpp color chars
[4]
blink enable
[3:0]
foreground color for 1bpp chars
for 4bpp color chars
[3:2]: Reserved
[1]: flip vertical
[0]: flip horizontal
Table 23: OSD Register
Register Name
Addr
Mode
Bits
Default
(hex)
Description
OSD_PORT
0x0C02
R/W
[7:0]
0
OSD Access Port
Table 22: OSD Attribute Map Definition (Sheet 4 of 4)
Row
Column
Bits
Description



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