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ADE3700 数据表(PDF) 45 Page - STMicroelectronics

部件名 ADE3700
功能描述  Analog LCD Display Engine for XGA and SXGA Resolutions
PDF  89 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ADE3700 数据表(HTML) 45 Page - STMicroelectronics

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ADE3700
Output Sequencer
2.11
Output Sequencer
The Output Sequencer module synchronizes timing for the output video interface. It allows sufficient
flexibility to support a broad range of Smart Panel applications as well using the Output Timing
Controller (TCON) module, refer to Section 2.12 for more details. The timing unit is based on
horizontal and vertical counters, which are locked with the input video stream.
2.11.1 Frame Synchronization
Due to the limited pixel memory of the chip, the output active video needs to be perfectly
synchronized with the input active video. This mode of operation is called
Frame Lock.
2.11.2 Timing Unit
The Timing Unit consists of a 12-bit horizontal and 12-bit vertical counter. It is synchronized with the
input video stream.
2.11.3 Signal Generation
The Signal Generation unit can generate all fixed control signals like hsync, vsync and data enable
as well as those required to run the internal data path. The fixed control signals appear on the
Figure 5: Output Sequencer and Timing Controller Block Diagram
Figure 6: Frame Lock Operation
I2C Interface
timing unit
delay
vert_start
horizontal
vertical
signal generation
fixed (OSQ)
programmable (TCON)
hs, vs, den
tcon [o:13]



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