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ADE3700 数据表(PDF) 79 Page - STMicroelectronics |
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ADE3700 数据表(HTML) 79 Page - STMicroelectronics |
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79 / 89 page  79/89 ADE3700 Output Multiplexer OMUX_ DLY_BB2 0x0C43 R/W [7:4] 0x0 Delay for OBB3 R/W [3:0] 0x0 Delay for OBB2 OMUX_ DLY_BB4 0x0C42 R/W [7:4] 0x0 Delay for OBB5 R/W [3:0] 0x0 Delay for OBB4 OMUX_ DLY_BB6 0x0C41 R/W [7:4] 0x0 Delay for OBB7 R/W [3:0] 0x0 Delay for OBB6 OMUX_ DLY_GB0 0x0C40 R/W [7:4] 0x0 Delay for ORB1 R/W [3:0] 0x0 Delay for ORB0 OMUX_ DLY_GB2 0x0C3F R/W [7:4] 0x0 Delay for ORB3 R/W [3:0] 0x0 Delay for ORB2 OMUX_ DLY_GB4 0x0C3E R/W [7:4] 0x0 Delay for ORB5 R/W [3:0] 0x0 Delay for ORB4 OMUX_ DLY_GB6 0x0C3D R/W [7:4] 0x0 Delay for ORB7 R/W [3:0] 0x0 Delay for ORB6 OMUX_ DLY_RB0 0x0C3C R/W [7:4] 0x0 Delay for ORB1 R/W [3:0] 0x0 Delay for ORB0 OMUX_ DLY_RB2 0x0C3B R/W [7:4] 0x0 Delay for ORB3 R/W [3:0] 0x0 Delay for ORB2 OMUX_ DLY_R_B4 0x0C3A R/W [7:4] 0x0 Delay for ORB5 R/W [3:0] 0x0 Delay for ORB4 OMUX_ DLY_R_B6 0x0C39 R/W [7:4] 0x0 Delay for ORB7 R/W [3:0] 0x0 Delay for ORB6 OMUX_ DLY_TCON_0 0x0C38 R/W [7:4] 0x0 Delay for TCON1 R/W [3:0] 0x0 Delay for TCON0 OMUX_ DLY_TCON_2 0x0C37 R/W [7:4] 0x0 Delay for TCON3 R/W [3:0] 0x0 Delay for TCON2 OMUX_ DLY_TCON_4 0x0C36 R/W [7:4] 0x0 Delay for TCON5 R/W [3:0] 0x0 Delay for TCON4 OMUX_ DLY_TCON_6 0x0C35 R/W [7:4] 0x0 Delay for TCON7 R/W [3:0] 0x0 Delay for TCON6 OMUX_ DLY_VS_ENAB 0x0C34 R/W [7:4] 0x0 Delay for VSYNC R/W [3:0] 0x0 Delay for ENAB OMUX_ DLY_CLK_HS 0x0C33 R/W [7:4] 0x0 Delay for CLK R/W [3:0] 0x0 Delay for HSYNC Table 32: Output Mux Registers (Sheet 3 of 4) Register Name Addr Mode Bits Default Description |
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