TMS320C31PQL60 datasheet(37/48 Pages) TI

37 / 48 page

TMS320C31, TMS320LC31

DIGITAL SIGNAL PROCESSORS

SPRS035B – MARCH 1996 – REVISED JANUARY 1999

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

data-rate timing modes

Unless otherwise indicated, the data-rate timings shown in Figure 25 and Figure 26 are valid for all serial-port

modes, including handshake. For a functional description of serial-port operation refer to subsection 8.2.12 of

the

TMS320C3x User’s Guide (literature number SPRU031).

The serial-port timing parameters for seven ’C3x devices are defined in the preceding “serial-port timing

parameters” tables (such as “serial-port timing parameters for TMS320C31-60”). The numbers shown in

Figure 25 and Figure 26 correspond with those in the NO. column of each table.

FSX(EXT)

FSX(INT)

FSR

CLKX/R

Bit 0

Bit

n-1

Bit

n-2

Bit

n-1

Bit

n-2

NOTES: A. Timing diagrams show operations with CLKXP = CLKRP = FSXP = FSRP = 0.

B. Timing diagrams depend on the length of the serial-port word, where n = 8, 16, 24, or 32 bits, respectively.

Figure 25. Timing for Fixed Data-Rate Mode

TMS320C31PQL60 数据表(PDF) 37 Page - Texas Instruments