TMS320C31PQL60 datasheet(14/48 Pages) TI

14 / 48 page

TMS320C31, TMS320LC31

DIGITAL SIGNAL PROCESSORS

SPRS035B – MARCH 1996 – REVISED JANUARY 1999

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

PARAMETER MEASUREMENT INFORMATION

Tester Pin

Electronics

VLoad

IOL

IOH

Output

Under

Test

Where:

IOL

= 2 mA (all outputs)

IOH

= 300

µA (all outputs)

VLOAD = 2.15 V

= 80-pF typical load-circuit capacitance

Figure 7. TMS320LC31 Test Load Circuit

signal transition levels for ’LC31 (see Figure 8 and Figure 9)

Outputs are driven to a minimum logic-high level of 2 V and to a maximum logic-low level of 0.4 V. Output

transition times are specified as follows:

D For a high-to-low transition on an output signal, the level at which the output is said to be no longer high

is 2 V and the level at which the output is said to be low is 1 V.

D For a low-to-high transition, the level at which the output is said to be no longer low is 1 V and the level at

which the output is said to be high is 2 V.

0.4 V

0.6 V

2 V

1.8 V

Figure 8. ’LC31 Output Levels

Transition times for inputs are specified as follows:

D For a high-to-low transition on an input signal, the level at which the input is said to be no longer high is

1.8 V and the level at which the input is said to be low is 0.6 V.

D For a low-to-high transition on an input signal, the level at which the input is said to be no longer low is

0.6 V and the level at which the input is said to be high is 1.8 V.

1.8 V

0.6 V

Figure 9. ’LC31 Input Levels

TMS320C31PQL60 数据表(PDF) 14 Page - Texas Instruments

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