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TMS320C31PQL60 数据表(PDF) 27 Page - Texas Instruments

部件名 TMS320C31PQL60
功能描述  DIGITAL SIGNAL PROCESSORS
PDF  48 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

TMS320C31PQL60 数据表(HTML) 27 Page - Texas Instruments

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timing parameters for RESET for the TMS320C31 and TMS320LC31 (see Figure 21)
NO.
’LC31-33
’C31-40
’LC31-40
’LC31-40
’C31-50
’C31-60
’C31-80
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
38
tsu(RESET-CIL)
Setup time, RESET before
CLKIN low
10
P†‡
10
P†‡
10
P†‡
10
P†‡
7
P†‡
4
P†‡
ns
39
td(CLKINH-H1H)
Delay time, CLKIN high to H1
high§
2
12
2
12¶
2
14
2
10
2
10
2
8
ns
40
td(CLKINH-H1L)
Delay time, CLKIN high to H1
low§
2
12
2
12¶
2
14
2
10
2
10
2
8
ns
41
tsu(RESETH-H1L)
Setup time, RESET high before
H1 low and after ten H1 clock
cycles
10
9
9
7
6
5
ns
42
td(CLKINH-H3L)
Delay time, CLKIN high to H3
low§
2
12¶
2
12
2
14
2
10
2
10
2
8
ns
43
td(CLKINH-H3H)
Delay time, CLKIN high to H3
high§
2
12¶
2
12
2
14
2
10
2
10
2
8
ns
44
tdis(H1H-DZ)
Disable time, H1 high to D (high
impedance)
15#
13#
13#
12#
11#
9#
ns
45
tdis(H3H-AZ)
Disable time, H3 high to A (high
impedance)
10#
9#
9#
8#
7#
6#
ns
46
td(H3H-CONTROLH)
Delay time, H3 high to control
signals high
10#
9#
9#
8#
7#
6#
ns
47
td(H1H-RWH)
Delay time, H1 high to R/W high
10#
9#
9#
8#
7#
6#
ns
48
td(H1H-IACKH)
Delay time, H1 high to IACK
high
10#
9#
9#
8#
7#
6#
ns
49
tdis(RESETL-ASYNCH)
Disable time, RESET low to
asynchronous reset signals
disabled (high impedance)
25#
21#
21#
17#
14#
12#
ns
† P = tc(CI)
‡ Specified by design but not tested
§ See Figure 22 for temperature dependence .
¶ 14 ns for the extended temperature ’C31-40
# This value is characterized but not tested



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