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ST7MC1 数据表(PDF) 167 Page - STMicroelectronics |
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ST7MC1 数据表(HTML) 167 Page - STMicroelectronics |
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167 / 308 page  ST7MC1/ST7MC2 167/308 MOTOR CONTROLLER (Cont’d) 10.6.7 Delay Manager Figure 91. Overview of MTIM Timer in Switched and Autoswitched Mode This part of the MTC contains all the time-related functions, its architecture is based on an 8-bit shift left/shift right timer shown in Figure 91. The MTIM timer includes: – An auto-updated prescaler – A capture/compare register for simulated de- magnetization simulation (MDREG) – Two cascaded capture and one compare regis- ters (MZREG and MZPRV) for storing the times between two consecutive BEMF zero crossings (ZH events) and for zero-crossing event simula- tion (ZS) – An 8x8 bit multiplier for auto computing the next commutation time – One compare register for phase commutation generation (MCOMP) The MTIM timer module can work in two main modes when driving synchronous motors in six- steps mode. In switched mode the user must process the step duration and commutation time by software. In autoswitched mode the commutation action is performed automatically depending on the rotor position information and register contents. This is called the hardware commutation event CH. When enabled by the SC bit in the MCRC register, com- mutation can also be simulated by writing a value directly in the MCOMP register that is compared with the MTIM value. This is called simulated com- mutation CS (See “Built-in Checks and Controls for simulated events” on page 174.). Both in switched mode and autoswitched mode , if the SC bit in the MCRC register is set (software commutation enabled), no comparison between 8-bit Up Counter MTIM § MZREG [Zn] § DS MDREG [Dn] § Compare ZH DH ck CH,S DS,H ZH,S 8 Tratio SDM* bit Z clr 1 0 C SWA bit § = Register updated on R event To interrupt generator To interrupt generator To interrupt generator MCRA register MCRB register Compare ZS SZ bit MCRC register ZH / ZS MZPRV [Zn-1] § Filter /D MZFR register ZWF[3:0] Filter /C MDFR register DWF[3:0] CH / CS Compare MCOMP [Cn+1] § SC bit MCRC register 1 |
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