ST72734 datasheet(65/144 Pages) STMICROELECTRONICS

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ST72774/ST727754/ST72734

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SYNC PROCESSOR (SYNC) (Cont’d)

4.4.8 Analyzer Mode

The

analyzer

block

used

for

all

extra

measurements on the sync signals to manage the

monitor functions:

– Measure the number of scan lines per frame

(VSYNCO or VFBACK) to simplify the OSD ver-

tical centering.

– Measure the low level of HSYNCO or HFBACK.

This function can be used for VSYNCO pulse

extension or for a fast estimation of the incoming

Hsync signal period.

– Detection of the pre/post equalization pulses.

Notes:

1. Analyzer mode should be performed before

corrector mode.

2. When analyzer mode is active, the free-running

frequencies generator and corrector mode must

be disabled.

– HVGEN = 0 in ENR register

– 2FHINH 0 in CFGR register for Horizontal low

level measurement

– VEXT = 0, VCORDIS = 1 in CFGR, POLR reg-

isters for Vertical output measurement

3. If H/VBACK are selected (FBSEL=0) corrector

mode must be disabled

4. For all measurements, HSYNCO and VSYNCO

must be POSITIVE.

4.4.8.1 Horizontal Low Level Measurement

The measurement starts in setting HACQ by

software. When this bit is cleared by hardware, the

HGENR register returns the result.

The algorithm is shown in Figure 45.

HLow = ((255-HGENR+1)/4) µs

Note: HLow maximum value = 64µs (even if real value is

greater)

For maximum accuracy, it is possible to measure

the low level of HFBACK with the same technique

(FBSEL bit in the MCR register).

Figure 45. Horizontal Low Level Measurement

VR02118A

END

HGENR=Result

HACQ=0?

Measure HLow

Disable H correction Mode

2FHINH=0

Disable H internal generation

HVGEN=0

HSYNCO Positive polarity

Necessary if Signals

are H/VSYNCO

Select H/VBACK or H/VSYNCO

FBSEL=0 or 1

HACQ=1

Start measurement

Yes

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