ST72734 datasheet(40/144 Pages) STMICROELECTRONICS

部件名	ST72734

功能描述	8-BIT USB MCU FOR MONITORS, WITH UP TO 60K OTP, 1K RAM, ADC, TIMER, SYNC, TMU, PWM/BRM, H/W DDC & I2C

PDF	144 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

标志

40 / 144 page

ST72774/ST727754/ST72734

40/144

Table 13. Watchdog Timing (fCPU = 8 MHz)

Notes:

Following a reset, the watchdog is

disabled. Once activated it cannot be disabled,

except by a reset.

The T6 bit can be used to generate a software

reset (the WDGA bit is set and the T6 bit is

cleared).

4.2.4 Interrupts

None.

4.2.5 Register Description

CONTROL REGISTER (CR)

Read /Write

Reset Value: 0111 1111 (7F h)

Bit 7 = WDGA

Activation bit.

This bit is set by software and only cleared by

hardware after a reset. When WDGA = 1, the

watchdog can generate a reset.

0: Watchdog disabled

1: Watchdog enabled

Bit 6:0 = T[6:0]

7-bit timer (MSB to LSB).

These bits contain the decremented value. A reset

is produced when it rolls over from 40h to 3Fh (T6

becomes cleared).

Table 14. Watchdog Timer Register Map and Reset Values

CR Register

initial value

WDG timeout period

(ms)

Max

FFh

393.216

Min

C0h

6.144

WDGA

Address

(Hex.)

Label

WDGCR

Reset Value

WDGA

ST72734 数据表(PDF) 40 Page - STMicroelectronics

ST72734 数据表(HTML) 40 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载