If sample is stereo, there are two data inputs — D_L and D_R, if sample is mono, only one data input — D. All this data should be

converted to 16-bit signed format.

Conversion from unsigned data to signed data should be implemented by inverting the MSB.

Decimal

16-bit unsigned

16-bit signed

32767

FFFFh

7FFFh

2

8002h

0002h

1

8001h

0001h

0

8000h

0000h

−1

7FFFh

FFFFh

−2

7FFEh

FFFEh

−32768

0000h

8000h

conversion from unsigned data to signed data

Conversion from 8-bit data to 16-bit data should be implemented by scaling data range from [−128, 127] to [−32768, 32767], i.e.

adding eight ‘0’ to LSB.

Decimal

in

8-bit

unsigned

8-bit

signed

Decimal

out

16-bit

signed

127

FFh

7Fh

32512

7F00h

2

82h

02h

512

0200h

1

81h

01h

256

0100h

0

80h

00h

0

0000h

−1

7Fh

FFh

−256

FF00h

−2

7Eh

FEh

−512

FE00h

−128

00h

80h

−32768

8000h

conversion from 8-bit data to 16-bit data

4.1.5 Digital Mixer

There are three Digital Mixer — Main, Chorus and Reverb.

Terms:

ADl — (signed 26 bits) Main Mixer accumulator data (left channel)

ADr — (signed 26 bits) Main Mixer accumulator data (right channel)

CADl — (signed 23 bits) Chorus Mixer accumulator data (left channel)

CADr — (signed 23 bits) Chorus Mixer accumulator data (right channel)

RADl — (signed 23 bits) Chorus Mixer accumulator data (left channel)

RADr — (signed 23 bits) Chorus Mixer accumulator data (right channel)

(1) Main Mixer:

20-bit VDl, VDr should be expanded to 26-bit before addition.

Before ADl, ADr are sent to M_FIFO, 26-bit data should be converted to 20-bit with overflow and underflow consideration.

(2) Chorus Mixer:

17-bit CSDl, CSDr should be expanded to 23-bit before addition.

Before CADl, CADr are sent to C_FIFO, 23-bit data should be converted to 16-bit with overflow and underflow consideration.

17-bit RSDl, RSDr should be expanded to 23-bit before addition.

Before RADl, RADr are sent to R_FIFO, 23-bit data should be converted to 16-bit with overflow and underflow consideration.

4.1.6 LFO

LFO (Low Frequency Oscillator) is used to generate a low frequency sine wave, with which the sample wave is modulated in both

frequency domain and amplitude domain.

Each channel of Bank A has it’s own LFO, but all Bank B channels share one global LFO.

An 8-bit programmable counter (LFO counter) is employed for frequency control. It’s clock rate can be selected to be 48 kHz, 12

kHz, 3 kHz or 750 Hz .

A 4-bit incremental/decremental counter (SIN counter) is used to generate sine wave — sin[3:0] with one sign bit — SIN_S. Ev-

erytime an 8-bit LFO counter counts down to ‘0’, the SIN counter will count up or down once and the LFO counter will reload

LFO_INIT.

The SIN counter works like the following:

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