LM4560 datasheet(7/54 Pages) NSC

7 / 54 page

3.0 Register Description

3.1 PCI CONFIGURATION REGISTER MAP

Offset

+3h

+2h

+1h

+0h

00h

Device ID

Vendor ID

04h

Status

Command

08h

Class Code

Revision ID

0Ch

BIST

Header Type

Latency Timer

Cache Line Size

10h

Audio IO Base Address

14h

Audio Memory Base Address

18–28h

RSVD

2Ch

Subsystem ID

Subsystem Vendor ID

30h

RSVD

34h

RSVD

Cap_Ptr

38h

RSVD

3Ch

MAX_LAT

MIN_GNT

Interrupt Pin

Interrupt Line

40h

DDMA Slave CFG

44h

PM_Timer

PM_CFG

LEGACY_DMA

LEGACY_IOBASE

48h

RSVD

INT_VEC

INTA_SNOOP_ENA

DCh

PMC

PM_Next_Ptr

PM_Cap_ID

E0h

Power Value Data

PMCSR_BSE

PMCSR

3.1.1 PCI Configuration Register Description

3.1.1.1 Device ID & Vendor ID

PCI Configuration

Address:

00h–03h

Default:

001B100Bh

Description: read/write,

can

written

only

when

CFG46h[6]=1

Bit 31–16 device ID: default 001Bh

Bit 15–0 vendor ID: default 100Bh

3.1.1.2 Status & Command:

PCI Configuration

Address:

04h–07h

Default:

02900000h

Description:

Bit 2–0: R/W

Bit 28: TA Received target abort. Write 1 to clear.

Bit 29: MA Received master abort. Write 1 to clear.

Bit 20: PM PCI Power Management support, hardwired to 1

Bit 23, 25: hardwired to 1

The rest bits: hardwired to 0

3.1.1.3 Class Code & Revision ID:

PCI Configuration

Address:

08h–0Bh

Default:

04010001h

Description: read only

Bit 7–0: 01 revision ID

Bit 31–24: 04 Base class: Multimedia

Bit 23–16: 01 Sub-class: Audio device

Bit 15–8: 00 Interface

3.1.1.4 BIST, Header Type, Latency Timer & Cache Line

Size:

PCI Configuration

Address:

0Ch–0Fh

Default:

00000000h

Description:

Bit 15–12: R/W

The rest bits: hardwired to 0

3.1.1.5 Audio IO Base Register:

PCI Configuration

Address:

10h–13h

Default:

00000001h

Description:

Bit 31–8: R/W Audio IO base

Bit 7–1: Hardwire to 0

Bit 0: Hardwire to 1

3.1.1.6 Audio MEM Base Register:

PCI Configuration

Address:

14h–17h

Default:

00000000h

Description:

Bit 31–12: R/W Audio MEM base

Bit 11–0: Hardwire to 0

3.1.1.7 Subsystem ID & Subsystem vendor ID:

PCI Configuration

Address:

2Ch–2Fh

Default:

001B100Bh

Description: read only

Bit 31–16: subsystem ID: default 001Bh

Bit 15–0: subsystem vendor ID: default 100Bh

LM4560 数据表(PDF) 7 Page - National Semiconductor (TI)

LM4560 数据表(HTML) 7 Page - National Semiconductor (TI)

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LM4560 数据表(PDF) 7 Page - National Semiconductor (TI)

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