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L6717ATR 数据表(PDF) 52 Page - STMicroelectronics

部件名 L6717ATR
功能描述  Dynamic phase management
PDF  57 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

L6717ATR 数据表(HTML) 52 Page - STMicroelectronics

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LTB Technology®
L6717A
52/57
DocID024465 Rev 1
12
LTB Technology®
LTB Technology
®
further enhances the performance of dual-edge asynchronous systems by
reducing the system latencies and immediately turning ON all the phases to provide the
correct amount of energy to the load. By properly designing the LTB network as well as the
LTB gain, the undershoot and the ring-back can be minimized also optimizing the output
capacitors count. LTB Technology
®
applies only to the CORE Section.
LTB Technology
®
monitors the output voltage through a dedicated pin detecting load-
transients with selected dV/dt, it cancels the interleaved phase-shift, turning-on
simultaneously all phases. it then implements a parallel, independent loop that reacts to
load-transients bypassing E/A latencies.
LTB Technology
®
control loop is reported in
Figure 19.
Figure 19. LTB Technology® control loop (CORE section)
The LTB detector is able to detect output load transients by coupling the output voltage
through an R
LTB
- C
LTB
network. After detecting a load transient, the LTB Ramp is reset and
then compared with the COMP pin level. The resulting duty-cycle programmed is then OR-
ed with the PWMx signal of each phase by-passing the main control loop. All the phases will
then be turned-on together and the EA latencies results bypassed as well.
Sensitivity of the load transient detector can be programmed in order to control precisely
both the undershoot and the ring-back.
R
LTB
- C
LTB
is designed according to the output voltage deviation dV
OUT
which is desired
the controller to be sensitive as follow:
LTB technology® design tips.
Decrease R
LTB
to increase the system sensitivity making the system sensitive to
smaller dV
OUT
.
Increase C
LTB
to increase the system sensitivity making the system sensitive to
higher dV/dt.
Ref
FB
COMP
VSEN
PWM
L/N
ESR
C
O
d V
COMP
V
OUT
Z
F(s)
Z
FB(s)
VID
Monitor
R
LTB
C
LTB
PWM_BOOST
LTB Ramp
LTB
LT Detect
LT Detect
R
LTB
dVOUT
25
μA
------------------
=
C
LTB
1
2
π NR
LTB
F
SW
⋅⋅
--------------------------------------------------
=



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