L6717ATR datasheet(30/57 Pages) STMICROELECTRONICS

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Power manager I2C

L6717A

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DocID024465 Rev 1

6.1.1

Overspeeding command (OVRSPD)

This command allows adding a variable positive/negative offset to the reference

programmed by the SVI bus in order to overspeed the CPU. L6717A allows adding up to

1.550 V in 50 mV steps to the reference.

The maximum possible output voltage is internally limited to 2.8 V. In case the SVI

programmed reference plus the offset set through the OVRSPD command exceed this

value, the reference for the regulation will default to 2.8 V.

The minimum possible output voltage is internally limited to 0.5 V. In case the SVI

programmed reference minus the offset set through the OVRSPD command exceed this

value, the reference for the regulation will default to 0.5 V.

Once the controller acknowledges the command and recognizes the OVRSPD command,

the reference will step up or down until reaching the target offset performing a DVID

transition. In case a new overspeed command is issued while the output voltage is not yet

stabilized (i.e. the reference is still stepping to the target), the target is updated according to

the new offset defined.

The command address both sections through two separate bits in the command code (“CN”

bits - See

Table 12). By asserting the relative bit, the subsequent data stream will apply to

the identified section. Asserting both bits (CN = 11b) will address both sections. CN = 00b

will be ignored regardless of the data stream provided.

010

[1:4] xxxx

[5:6] k

DRP

[7:8] k

DRPNB

DRP_ADJ: Droop function adjustment. Modifies the slope of the

output voltage implemented through the droop function.

[1:4]: ignored

[5:6]: k

DRP

. Defines the k

DRP

factor for CORE section.

[7:8]:k

DRPNB

. Defines the k

DRPNB

factor for NB section.

Default value is k

DRPx

= 1/4 for both sections.

See

Table 16 for details about DRP_ADJ codification and Section 7.3

and

Section 7.6 for LoadLine definition.

011

[1:3] 000b

[4:5] DPMTH

[6] PSI_A

[7] PSI_EN

[8] DPM_ON

Power management flags: Set of three flags to define power

management actions of the controller.

[1:3]: 000b.

[4:5]: DPM Thresholds. Default is 00b.

[6] PSI_A:

PSI Action. It defines the action to take when PSI_L flag is

asserted by SVI bus. The same action is considered by DPM. Send

0b to work in single phase (default) or 1b to work at two phases.

[7] PSI_EN:

PSI Enable. It enables or disables the PSI management.

Set to 1b to manage PSI_L according to PSI_A or set to 0b (default)

to ignore PSI_L flag sent through SVI bus.

[8] DPM_ON:

Dynamic Phase Management. It enables or disables

the DPM mode. Set to 1b (default) to enable DPM or set to 0b to

disable it.

When enabled DPM acts automatically cutting phases according to

PSI Action flag at light load.

See

Section 6.2 for details about DPM.

Table 12. Power manager I2C command phase and data stream (continued)

Command

code [4:6]

Data stream

[1:8]

Description

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