L6717ATR datasheet(50/57 Pages) STMICROELECTRONICS

50 / 57 page

System control loop compensation

L6717A

50/57

DocID024465 Rev 1

System control loop compensation

The device embeds two separate and independent control loops for CORE and NB section.

The control loop for NB section is a simple Voltage-Mode control loop with (optional) voltage

positioning featured when DROOP pin is shorted with FB. The control loop for the CORE

section also features a current-sharing loop to equalize the current carried by each of the

configured phases.

The CORE control system can be modeled with an equivalent single-phase converter

whose only difference is the equivalent inductor L/N (where each phase has an L inductor

and N is the number of the configured phases). See

Figure 17.

Figure 17. Equivalent control loop for NB and CORE sections

This means that the same analysis can be used for both the sections with the only exception

of the different equivalent inductor value (L=L

for NB Section and L=L

CORE

/N for the

CORE section) and the current reading gain (DCR/R

G_NB

for NB Section and DCR/R

for

the CORE section).

The control loop gain results (obtained opening the loop after the COMP pin):

Where:

•

is the equivalent output resistance determined by the droop function;

•

(s) is the impedance resulting by the parallel of the output capacitor (and its ESR)

and the applied load R

;

•

(s) is the compensation network impedance;

•

(s) is the equivalent inductor impedance;

•

A(s) is the error amplifier gain;

•

is the PWM transfer function.

The control loop gain for each section is designed in order to obtain a high DC gain to

minimize static error and to cross the 0dB axes with a constant -20dB/Dec. slope with the

desired crossover frequency

. Neglecting the effect of Z

(s), the transfer function has one

zero and two poles; both the poles are fixed once the output filter is designed (LC filter

resonance

) and the zero (

ESR

) is fixed by ESR and the droop resistance.

Ref

NB_COMP

F_NB

FB_NB

PWM

ESR_NB

O_NB

d V

NB_COMP

OUT_NB

F(s)

FB(s)

VID_NB

Ref

COMP

PWM

CORE

ESR

d V

COMP

OUT

F(s)

FB(s)

VID_CORE

NB_FB

LOOP

()

PW M

() R

()

⋅⋅

() Z

()

[]

()

--------------

()

------------





⋅

-------------------------------------------------------------------------------------------------------------------

–

PWM

---

ΔV

OS C

-------------------

⋅

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