L6717ATR datasheet(43/57 Pages) STMICROELECTRONICS

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L6717A

Output voltage monitoring and protections

When the voltage sensed by VSEN and/or NB_VSEN overcomes the OV threshold, the

controller:

–

Permanently sets the PWM of the involved section to zero keeping ENDRV of that

section high in order to keep all the Low-Side MOSFETs on to protect the load of

the Section in OV condition.

–

Permanently sets the PWM of the non-involved section to HiZ while keeping

ENDRV of the non-involved section low in order to realize an HiZ condition of the

non-involved section.

–

Drives the OSC/ FLT pin high.

–

Power supply or EN pin cycling is required to restart operations.

Filter OVP pin with 100 pF(typ) to SGND.

8.2

Feedback disconnection

L6717A provides both CORE and NB sections with FB disconnection protection. This

feature acts in order to stop the device from regulating dangerous voltages in case the

remote sense connections are left floating. The protection is available for both the sections

and operates for both the positive and negative sense.

According to

Figure 14, the protection works as follow:

•

CORE section:

Positive sense is performed monitoring the CORE output voltage through both VSEN

and CS1N. As soon as CS1N is more than 600 mV higher than VSEN, the device

latches in HiZ. FLT pin is driven high. A 50

μA pull-down current on the VSEN forces

the device to detect this fault condition.

Negative sense is performed monitoring the internal opamp used to recover the GND

losses by comparing its output and the internal reference generated by the DAC. As

soon as the difference between the output and the input of this opamp is higher than

500 mV, the device latches in HiZ. FLT pin is driven high.

•

NB section (SVI only)

Positive sense is performed monitoring the NB output voltage through both NB_VSEN

and NB_CSN. As soon as NB_CSN is more than 600 mV higher than NB_VSEN, the

device latches in HiZ. FLT pin is driven high. A 50

μA pull-down current on the

NB_VSEN forces the device to detect this fault condition.

Negative sense is performed monitoring the internal opamp used to recover the GND

losses by comparing its output and the internal reference generated by the DAC. As

soon as the difference between the output and the input of this opamp is higher than

500 mV, the device latches in HiZ. FLT pin is driven high.

To recover from a latch condition, cycle VCC or EN.

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