L6717ATR datasheet(39/57 Pages) STMICROELECTRONICS

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L6717A

Output voltage positioning

slope (

Figure 10).

The output characteristic vs. load current is then given by:

Where R

LL_NB

is the resulting load-line resistance implemented by the NB section. k

DRPNB

value is determined by the power manager I

C and its default value is 1/4.

FB_NB

resistor can be then designed according to the R

LL_NB

specifications and DRP_ADJ

setting as follow:

7.7

On-the-fly VID transitions

L6717A manages on-the-fly VID Transitions that allow the output voltage of both sections to

modify during normal device operation for CPU power management purposes. OV, UV and

PWRGOOD signals are masked during every OTF-VID Transition and they are re-activated

with a 16 clock cycle delay to prevent from false triggering.

When changing dynamically the regulated voltage (OTF-VID), the system needs to charge

or discharge the output capacitor accordingly. This means that an extra-current I

OTF-VID

needs to be delivered (especially when increasing the output regulated voltage) and it must

be considered when setting the over current threshold of both the sections. This current

results:

where dV

OUT

/ dT

VID

depends on the operative mode (7 mV/

μsec. in SVI or externally driven

in PVI).

Overcoming the OC threshold during the dynamic VID causes the device latch and disable.

Dynamic VID transition is managed in different ways according to the device operative

mode:

•

PVI mode.

L6717A checks for VID code modifications (See

Figure 12) on the rising-edge of an

internal additional OTFVID-clock and waits for a confirmation on the following falling

edge. Once the new code is stable, on the next rising edge, the reference starts

stepping up or down in LSB increments every two OTFVID-clock cycle until the new

VID code is reached. During the transition, VID code changes are ignored; the device

re-starts monitoring VID after the transition has finished on the next rising-edge

available. OTFVID-clock frequency (F

OTFVID

) is 500 kHz.

If the new VID code is more than 1 LSB different from the previous, the device will

execute the transition stepping the reference with the OTFVID-clock frequency F

OTFVID

until the new code has reached. The output voltage rate of change will be of 12.5 mV /

μsec. = 3.125 mV/μsec.

OUT_NB

=V I D

FB_NB

DR PN B

DROOP_NB

⋅⋅

–

VID

FB_NB

DR PN B

DC R

G_NB

----------------- I

OU T

⋅⋅

⋅

–

VID

LL_NB

OUT_NB

⋅

–

FB_NB

LL_NB

DR PN B

---------------------

I SEN

ds O N

-----------------

⋅

OTF-VID

OU T

OUT

VI D

------------------

⋅

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