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L6717ATR 数据表(PDF) 45 Page - STMicroelectronics |
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L6717ATR 数据表(HTML) 45 Page - STMicroelectronics |
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45 / 57 page ![]() DocID024465 Rev 1 45/57 L6717A Output voltage monitoring and protections V OC_TOT , the device detects an OC and immediately latches with all the MOSFETs of all the sections OFF (HiZ). Typical design considers the intervention of the total current OC before the Per-Phase OC, leaving this last one as an extreme-protection in case of hardware failures in the external components. Typical design flow is the following: – Define the maximum total output current (I OC_TOT ) according to system requirements – Design Per-Phase OC and R G resistor in order to have I INFOx = I OC_TH (35 μA) when I OUT is about 10% higher than the I OC_TOT current. It results: where N is the number of phases and DCR the DC resistance of the inductors. R G should be designed in worst-case conditions. – Design the total current OC and R ILIM in order to have the ILIM pin voltage to V OC_TOT at the desired maximum current I OC_TOT . It results: where V OC_TOT is typically 2.5V and I OC_TOT is the total current OC threshold desired. – Adjust the defined values according to bench-test of the application. – An additional capacitor in parallel to R ILIM can be considered to add a delay in the protection intervention. Note: What previously listed is the typical design flow. Custom design and specifications may require different settings and ratios between the Per-Phase OC threshold and the total current OC threshold. Applications with huge ripple across inductors may be required to set Per-Phase OC to values different than 110%: design flow should be modified accordingly. DRP_ADJ command from power manager I2C does not alter the current information used for Per-Phase OC and total current OC. 8.4.2 IddSpike and IddTDC support L6717A supports G34 processors and as a consequence, allows dual level OCP supporting IddSpike and IddTDC (refer to CPU related documents for details about IddSpike and IddTDC levels). Proper design of the per-phase and Total Current OC is required to meet these specifications: – per-phase OC is used to face with IddSpike: set to 120% (Typ) of IddSpike; – Total current OC is used to face with IddTDC: set to 120% (Typ) of IddTDC and provide proper filtering. R G 1.1 I OC_TOT ⋅ () DCR ⋅ NI ⋅ OC T H -------------------------------------------------------- = R ILIM V OC_TOT R G ⋅ I OC_TOT DC R ⋅ --------------------------------------- = I LI M DC R R G ------------- I OU T ⋅ = |
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