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L6717ATR 数据表(PDF) 25 Page - STMicroelectronics

部件名 L6717ATR
功能描述  Dynamic phase management
PDF  57 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

L6717ATR 数据表(HTML) 25 Page - STMicroelectronics

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L6717A
Hybrid CPU support and CPU_TYPE detection
5.4.2
PWROK de-assertion
Anytime PWROK de-asserts while EN is asserted, the controller uses the previously stored
Pre-PWROK Metal VID and regulates all the planes to that level performing an on-the-fly
transition to that level.
PWRGOOD is treated appropriately being de-asserted in case the
Pre-PWROK Metal VID
voltage is out of the initial voltage specifications.
5.4.3
PSI_L and efficiency optimization at light-load
PSI_L is an active-low flag (i.e. low logic level when asserted) that can be set by the CPU to
allow the VR to enter power-saving mode to maximize the system efficiency when in light-
load conditions. The status of the flag is communicated to the controller through the SVI
bus.
When the PSI_L flag is asserted by the CPU through the SVI bus, the device adjusts the
phase number and interleaving according to the strategy programmed. Default strategy,
when enabled, consists in working in single phase. PSI strategy can be disabled as well as
re-configured through specific power manager I
2
C commands. See
Section 6 for details.
In case the phase number is changed, the device will set HiZ on the related phase and re-
configure internal phase-shift to maintain the interleaving. Furthermore, the internal current-
sharing will be adjusted to consider the phase number reduction.
When PSI_L is de-asserted, the device will return to the original configuration. Start-up is
performed with all the configured phases enabled. In case of on-the-fly VID transitions, the
device will maintain the phase configuration set before.
NB section is not impacted by PSI_L status change.
Figure 8 shows an example of the
efficiency improvement that can be achieved by enabling the PSI management.
Figure 8. System efficiency enhancement by PSI
5.4.4
HiZ management
L6717A is able to manage HiZ for internal drivers and for the external drivers through the
PWMx signals. When the controller wants to set in high impedance the output of one
section, it sets the relative PWM floating and, at the same time, turn OFF the embedded
drivers of the related section.



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