L6717ATR datasheet(41/57 Pages) STMICROELECTRONICS

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L6717A

Output voltage positioning

7.8

Soft-start

L6717A implements a soft-start to smoothly charge the output filter avoiding high in-rush

currents to be required to the input power supply. In SVI mode, soft-start time is intended as

the time required by the device to set the output voltages to the

Pre-PWROK Metal VID.

During this phase, the device increases the reference of the enabled section(s) from zero up

to the programmed reference in closed loop regulation. Soft-start is implemented only when

VCC is above UVLO threshold and the EN pin is set free. See

Section 5 for details about the

SVI interface and how SVC/SVD are interpreted in this phase.

At the end of the digital soft-start, PWRGOOD signal is set free.

Protections are active during this phase as follow:

–

Undervoltage is enabled when the reference voltage reaches 0.5 V.

–

Overvoltage is always enabled according to the programmed threshold (by R

OVP

–

FBDisconnection is enabled.

Reference is increased with fixed dV/dt; Soft-Start time depends on the programmed voltage

as follow:

Figure 13. System start-up: SVI (left) and PVI (right)

7.8.1

LS-Less start-up

In order to avoid any kind of negative undershoot on the load side during start-up, L6717A

performs a special sequence in enabling the drivers for both sections: during the soft-start

phase, the LS MOSFET is kept OFF (PWMx set to HiZ and ENDRV = 0) until the first PWM

pulse. After the first PWM pulse, the PWMx outputs switches between logic “0” and logic “1”

and ENDRV are set to logic “1”.

This particular sequence avoids the dangerous negative spike on the output voltage that

can happen if starting over a pre-biased output especially when exiting from a CORE-OFF

state.

Low-side MOSFET turn-on is masked only from the control loop point of view: protections

are still allowed to turn-ON the low-side MOSFET in case of over voltage if needed.

[]

Target_VID

2.56

⋅

PGOOD

V_CORE

V_NB

PGOOD

V_CORE

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