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ST7LITEUS5 数据表(PDF) 62 Page - STMicroelectronics |
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ST7LITEUS5 数据表(HTML) 62 Page - STMicroelectronics |
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62 / 136 page  Obsolete Product(s) - Obsolete Product(s) Obsolete Product(s) - Obsolete Product(s) I/O ports ST7LITEUS2, ST7LITEUS5 62/136 Table 18. I/O port mode options(1) 1. NI stands for not implemented; Off for implemented not activated; On for implemented and activated. Configuration mode Pull-up P-buffer Diodes to VDD to VSS Input Floating with/without Interrupt Off Off On On Pull-up with/without Interrupt On Output Push-pull Off On Open Drain (logic level) Off Table 19. I/O port configurations Hardware configuration 1. When the I/O port is in input configuration and the associated alternate function is enabled as an output, reading the DR register will read the alternate function output status. 2. When the I/O port is in output configuration and the associated alternate function is enabled as an input, the alternate function reads the pin status given by the DR register content. CONDITION PAD VDD RPU EXTERNAL INTERRUPT POLARITY DATA BUS PULL-UP INTERRUPT DR REGISTER ACCESS W R FROM OTHER PINS SOURCE (eix) SELECTION DR REGISTER CONDITION ALTERNATE INPUT ANALOG INPUT PAD RPU DATA BUS DR DR REGISTER ACCESS R/W VDD ALTERNATE ALTERNATE ENABLE OUTPUT REGISTER PAD RPU DATA BUS DR DR REGISTER ACCESS R/W VDD ALTERNATE ALTERNATE ENABLE OUTPUT REGISTER Obsolete Product(s) - Obsolete Product(s) |
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