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ST7LITEUS5 数据表(PDF) 95 Page - STMicroelectronics

部件名 ST7LITEUS5
功能描述  Interrupt management
PDF  136 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST7LITEUS5 数据表(HTML) 95 Page - STMicroelectronics

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Obsolete
Product(s)
- Obsolete
Product(s)
Obsolete
Product(s)
- Obsolete
Product(s)
ST7LITEUS2, ST7LITEUS5
Electrical characteristics
95/136
Figure 39.
fCPU maximum operating frequency versus VDD supply voltage
12.3.2
Operating conditions with low voltage detector (LVD)
TA = -40 to 125 °C, unless otherwise specified
fCPU [MHz]
SUPPLY VOLTAGE [V]
8
4
2
0
2.0
2.4
3.3
3.5
4.0
4.5
5.0
FUNCTIONALITY
NOT GUARANTEED
IN THIS AREA
5.5
FUNCTIONALITY
GUARANTEED
IN THIS AREA
(UNLESS OTHERWISE
STATED IN THE
TABLES OF
PARAMETRIC DATA)
2.7
Table 47.
Operating characteristics with LVD
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIT+(LVD)
Reset release threshold
(VDD rise)
High threshold
Med. threshold
Low threshold
3.9
3.2
2.5
4.2
3.5
2.7
4.5
3.8
3.0
V
VIT-(LVD)
Reset generation threshold
(VDD fall)
High threshold
Med. threshold
Low threshold
3.7
3.0
2.4
4.0
3.3
2.6
4.3
3.6
2.9
Vhys
LVD voltage threshold
hysteresis
VIT+(LVD)-VIT-(LVD)
150
mV
VtPOR
VDD rise time rate
(1)(2)
1.
Not tested in production. The VDD rise time rate condition is needed to ensure a correct device power-on and LVD reset
release. When the VDD slope is outside these values, the LVD may not release properly the reset of the MCU
2.
Use of LVD with capacitive power supply: with this type of power supply, if power cuts occur in the application, it is
recommended to pull VDD down to 0V to ensure optimum restart conditions. Refer to circuit example in Figure 61 on
page 114.
20
μs/V
IDD(LVD)
(3)
3.
Not tested in production.
LVD/AVD current consumption
VDD = 5 V
220
μA
Obsolete
Product(s)
- Obsolete
Product(s)



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