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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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ST7LITEUS5 数据表(PDF) 76 Page - STMicroelectronics |
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ST7LITEUS5 数据表(HTML) 76 Page - STMicroelectronics |
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76 / 136 page  Obsolete Product(s) - Obsolete Product(s) Obsolete Product(s) - Obsolete Product(s) On-chip peripherals ST7LITEUS2, ST7LITEUS5 76/136 Auto reload register (ATRL) This is a 12-bit register which is written by software. The ATR register value is automatically loaded into the upcounter when an overflow occurs. The register value is used to set the PWM frequency. Reset value: 0000 0000 (00h) PWM0 duty cycle register high (DCR0H) Reset value: 0000 0000 (00h) PWM0 duty cycle register low (DCR0L) This 12-bit value is written by software. The high register must be written first. In PWM mode (OE0=1 in the PWMCR register) the DCR[11:0] bits define the duty cycle of the PWM0 output signal (see Figure 34). In Output Compare mode, (OE0=0 in the PWMCR register) they define the value to be compared with the 12-bit upcounter value. Reset value: 0000 0000 (00h) 7 0 ATR7 ATR6 ATR5 ATR4 ATR3 ATR2 ATR1 ATR0 Read/Write Bits 15:12 Reserved, must be kept cleared. Bits 11:0 ATR[11:0] Auto-reload Register. 15 8 0 0 0 0 DCR11 DCR10 DCR9 DCR8 Read/Write 7 0 DCR7 DCR6 DCR5 DCR4 DCR3 DCR2 DCR1 DCR0 Read/Write Bits 15:12 Reserved, must be kept cleared. Bits 11:0 DCR[11:0] PWMx duty cycle value Obsolete Product(s) - Obsolete Product(s) |
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