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AD9925BBCZRL 数据表(PDF) 44 Page - Analog Devices

部件名 AD9925BBCZRL
功能描述  CCD Signal Processor with Vertical Driver and Precision Timing Generator
PDF  96 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9925BBCZRL 数据表(HTML) 44 Page - Analog Devices

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AD9925
Rev. A | Page 44 of 96
VD
FG_TRIG PROGRAMMABLE SETTINGS:
1. ACTIVE POLARITY.
2. FIRST TOGGLE POSITION, LINE AND PIXEL LOCATION.
3. SECOND TOGGLE POSITION, LINE AND PIXEL LOCATION.
4. FIELD PLACEMENT BASED ON MODE REGISTER FIELD COUN
MODE REGISTER
FIELD COUNT
T.
FG_TRIG
1
2
3
FIELD 0
FIELD 1
4
FIELD 2
FIELD 0
FIELD 1
4
G_TRIG Signal
Figure 53. Generating the F
VD
VSUB OUT
SHUT_XTRA[8] = 0
FG_TRIG
INTERNAL
VSUB
INTERNAL
VSUB OUT
SHUT_XTRA[8] = 1
Figure 54. Combining FG_TRIG and VSUB to Create Four Toggle Positions for VSUB Output



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