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AD9925BBCZRL 数据表(PDF) 73 Page - Analog Devices

部件名 AD9925BBCZRL
功能描述  CCD Signal Processor with Vertical Driver and Precision Timing Generator
PDF  96 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9925BBCZRL 数据表(HTML) 73 Page - Analog Devices

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AD9925
Rev. A | Page 73 of 96
Map
Table 54. Vertical Pattern Group 7 (VPAT7) Register
Address
Data Bit Content
Default Value
Register Name
Register Description
54
[5:0]
[11:6
[23:1
]
2]
4[3], XV5[4], XV6[5].
7. Note: If using VPAT7 as a second vertical
tion for
X
X
X
VPOL_7
UNUSED
VPATLEN_7
VPAT7 Start Polarity. XV1[0], XV2[1], XV3[2], XV
Unused.
Total Length of VPAT
sequence in the VSG active line, this value is the start posi
the second vertical sequence.
55
1:0]
V1TOG1_7
Position 1.
[1
[23:12]
X
X
X
XV1TOG2_7
XV1 Toggle
XV1 Toggle Position 2.
56
X
7
e Position 1.
[11:0]
[23:12]
X
XV1TOG3_7
XV2TOG1_
XV1 Toggle Position 3.
XV2 Toggl
57
[11:0]
[23:12]
X
X
XV2TOG2_7
XV2TOG3_7
XV2 Toggle Position 2.
XV2 Toggle Position 3.
58
[11:0]
[23:12]
X
X
XV3TOG1_7
XV3TOG2_7
XV3 Toggle Position 1.
XV3 Toggle Position 2.
59
[11:0]
[23:12]
X
X
XV3TOG3_7
XV4TOG1_7
XV3 Toggle Position 3.
XV4 Toggle Position 1.
5A
[11:0]
[23:12]
X
X
XV4TOG2_7
XV4TOG3_7
XV4 Toggle Position 2.
XV4 Toggle Position 3.
5B
[11:0]
[23:12]
X
X
XV5TOG1_7
XV5TOG2_7
XV5 Toggle Position 1.
XV5 Toggle Position 2.
5C
[11:0]
[23:12]
X
X
XV5TOG3_7
XV6TOG1_7
XV5 Toggle Position 3.
XV6 Toggle Position 1.
5D
[11:0]
[23:12]
X
X
XV6TOG2_7
XV6TOG3_7
XV6 Toggle Position 2.
XV6 Toggle Position 3.
5E
[23:12]
X
RESUME1_7
XV1 to XV6 Resume Position 1.
[11:0]
X
FREEZE1_7
XV1 to XV6 Freeze Position 1.
5F
[11:0]
X
FREE
[23:12]
X
ZE2_7
XV1 to XV6 Freeze Position 2.
ition 2.
RESUME2_7
XV1 to XV6 Resume Pos



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