AD9925BBCZRL datasheet(19/96 Pages) AD

19 / 96 page

AD9925

Rev. A | Page 19 of 96

e field. These lines will not

activ

MASKTYPE is set l

SK re

cif

lines

e CLPMAS

grammed to specify the starting and ending lines in the f

the CLPOB patterns will be ignored. There are three sets

es,

ng up

regi

ays

B ma

ers

be set to the maximum value of 0xFFF (default value).

Individual HBLK Patterns

The HBLK programmable timing shown in Figure 24 is similar

olarity control. Only

itionally, there is a polarity

designates the polarity of the horizontal

g the blanking period. Setting

2 = H4 = High

he CLPOB

ach vertical

e used with

e H3/H4 signals

to remain active during HBLK. To do this, set register Bit D6 in

ul if the H3 output is

iption

to specify six individual lines within th

contain an

e CLPOB ulse. CLP

ow for this

mode of oper ion.

Second, th

of adjacent

e CLPMA

. Th

gisters can be used to spe

K start and end line val

y blocks

s are pro-

ield, where

of start

positions of the blanking period. Add

control HBLKMASK that

clock signals H1 to H4 durin

and end valu

allowi

to three CLPOB masking eas to be

HBLKMASK high will set H1 = H3 = Low and H

created. CLP ASKTYP is set high for this mode of o eration.

during the blanking, as shown in Figure 25. As with t

The CLPOB

asking

sters are not specific to a ce ain vertical

sequence, which allow different blanking signals to b

sequence; the are alw

active for any existing field

timing.

different vertical timing sequences.

To disable th CLPO

sking feature, these regist

should

One additional feature is the ability to enable th

Table 10. CLPOB and PBLK Pattern Registers

Length

Range

Descr

to CLPOB and PBLK, but there is no start p

the toggle positions are used to designate the start and the stop

and PBLK signals, HBLK registers are available in e

Addr 0xE7 equal to 1. This feature is usef

used to drive the HL (last horizontal gate) input of the CCD.

SPOL

1 b

High/Low

Starting Polarity of CLPOB/PBLK for Vertical Sequence 0 to 9.

TOG1

12 b

0 to 4095 Pixel Location

First Toggle Position within Line for Vertical Sequence 0 to 9.

TOG2

12 b

0 to 4095 Pixel Location

Second Toggle Position within Line for Vertical Sequence 0 to 9.

CLPOBMASK

12 b

0 to 4095 Line Location

CLPOBMASK0 thr

CLPOB pulse to be

ed to specify

three ranges of ad

ough CLPOBMASK5 specify six individual lines in the field for th

temporarily disabled. These registers can also be us

jacent lines, rather than six individual lines.

CLPMASKTYPE

1 b

High/Low

When set low (default), the CLPOBMASK registers select individual lines in the field

to disable the CLPOB pulse. When set high, the range masking is enabled, allowing

up to three blocks of adjacent lines to have the CLPOB signal masked. CLPOB-

MASK0 and CLPOBMASK1 are the start/end of the first block of lines, CLPOBMASK2

and CLPOBMASK3 are the start/end of the second block, and CLPOBMASK4 and

CLPOBMASK5 are the start/end of the third block.

CLPOB

PBLK

NOTES

PROGRAMMABLE SETTINGS:

1. START POLARITY (CLAMP AND BLANK REGION ARE ACTIVE LOW).

2. FIRST TOGGLE POSITION.

3. SECOND TOGGLE POSITION.

ACTIVE

Figure 23. Clamp and Preblank Pulse Placement

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