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AD9925BBCZRL 数据表(PDF) 78 Page - Analog Devices

部件名 AD9925BBCZRL
功能描述  CCD Signal Processor with Vertical Driver and Precision Timing Generator
PDF  96 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9925BBCZRL 数据表(HTML) 78 Page - Analog Devices

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AD9925
Rev. A | Page 78 of 96
Table 62. Vertical Sequence 4 (VSEQ4) Register Map
Address
Data Bit Content
Default Value
Register Name
Register Description
A0
[1:0]
[2]
[3]
[7:4]
[9:8]
[11:10]
[12]
[23:12]
X
X
X
X
X
X
X
HBLKMASK_4
CLPOBPOL_4
PBLKPOL_4
VPATSEL_4
VMASK_4
HBLKALT_4
HDLEN13_4
UNUSED
Masking Polarity during HBLK. H1 [0], H3 [1].
CLPOB Start Polarity.
PBLK Start Polarity.
Selected Vertical Pattern Group for Vertical Sequence 4.
Enable Masking of Vertical Outputs (Specified by FREEZE/RESUME
Registers).
Enable HBLK Alternation.
13th Bit for HD Length Counter Allows HD Length up to 8191 Pixels.
Unused.
A1
[11:0]
[23:12]
X
X
VPATREPO_4
VPATREPE_4
Number of Selected Vertical Pattern Group Repetitions for Odd
Lines.
Number of Selected Vertical Pattern Group Repetitions for Even
Lines.
A2
[11:0]
[23:12]
X
X
VPATSTART_4
HDLEN_4
Start Position in the Line for the Selected Vertical Pattern Group.
HD Line Length (Number of Pixels) for Vertical Sequence 4.
A3
[11:0]
[23:12]
X
X
PBLKTOG1_4
PBLKTOG2_4
PBLK Toggle Position 1 for Vertical Sequence 4.
PBLK Toggle Position 2 for Vertical Sequence 4.
A4
[11:0]
[23:12]
X
X
HBLKTOG1_4
HBLKTOG2_4
HBLK Toggle Position 1 for Vertical Sequence 4.
HBLK Toggle Position 2 for Vertical Sequence 4.
A5
[11:0]
[23:12]
X
X
HBLKTOG3_4
HBLKTOG4_4
HBLK Toggle Position 3 for Vertical Sequence 4.
HBLK Toggle Position 4 for Vertical Sequence 4.
A6
[11:0]
[23:12]
X
X
HBLKTOG5_4
HBLKTOG6_4
HBLK Toggle Position 5 for Vertical Sequence 4.
HBLK Toggle Position 6 for Vertical Sequence 4.
A7
[11:0]
[23:12]
X
X
CLPOBTOG1_4
CLPOBTOG2_4
CLPOB Toggle Position 1 for Vertical Sequence 4.
CLPOB Toggle Position 2 for Vertical Sequence 4.
Table 63. Vertical Sequence 5 (VSEQ5)Register Map
Address
Data Bit Content
Default Value
Register Name
Register Description
A8
[1:0]
[2]
[3]
[7:4]
[9:8]
[11:10]
[12]
[23:12]
X
X
X
X
X
X
X
HBLKMASK_5
CLPOBPOL_5
PBLKPOL_5
VPATSEL_5
VMASK_5
HBLKALT_5
HDLEN13_5
UNUSED
Masking Polarity during HBLK. H1 [0], H3 [1].
CLPOB Start Polarity.
PBLK Start Polarity.
Selected Vertical Pattern Group for Vertical Sequence 5.
Enable Masking of Vertical Outputs (Specified by FREEZE/RESUME
registers).
Enable HBLK Alternation.
13th Bit for HD Length Counter Allows HD Length up to 8191 Pixels.
Unused.
A9
[11:0]
[23:12]
X
X
VPATREPO_5
VPATREPE_5
Number of Selected Vertical Pattern Group Repetitions for Odd
Lines.
Number of Selected Vertical Pattern Group Repetitions for Even
Lines.
AA
[11:0]
[23:12]
X
X
VPATSTART_5
HDLEN_5
Start Position in the Line for the Selected Vertical Pattern Group.
HD Line Length (Number of Pixels) for Vertical Sequence 5.
AB
[11:0]
[23:12]
X
X
PBLKTOG1_5
PBLKTOG2_5
PBLK Toggle Position 1 for Vertical Sequence 5.
PBLK Toggle Position 2 for Vertical Sequence 5.
AC
[11:0]
[23:12]
X
X
HBLKTOG1_5
HBLKTOG2_5
HBLK Toggle Position 1 for Vertical Sequence 5.
HBLK Toggle Position 2 for Vertical Sequence 5.
AD
[11:0]
[23:12]
X
X
HBLKTOG3_5
HBLKTOG4_5
HBLK Toggle Position 3 for Vertical Sequence 5.
HBLK Toggle Position 4 for Vertical Sequence 5.
AE
[11:0]
[23:12]
X
X
HBLKTOG5_5
HBLKTOG6_5
HBLK Toggle Position 5 for Vertical Sequence 5.
HBLK Toggle Position 6 for Vertical Sequence 5.
AF
[11:0]
[23:12]
X
X
CLPOBTOG1_5
CLPOBTOG2_5
CLPOB Toggle Position 1 for Vertical Sequence 5.
CLPOB Toggle Position 2 for Vertical Sequence 5.



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