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AD9925BBCZRL 数据表(PDF) 77 Page - Analog Devices

部件名 AD9925BBCZRL
功能描述  CCD Signal Processor with Vertical Driver and Precision Timing Generator
PDF  96 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9925BBCZRL 数据表(HTML) 77 Page - Analog Devices

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AD9925
Rev. A | Page 77 of 96
R
e
Table 60. Vertical Sequence 2 (VSEQ2) Register Map
Address
Data Bit Content
Default Value
egister Name
R gister Description
90
[1:0]
[2]
[3]
[7:4]
[9:8]
[1
[12]
[23:12
1:10]
]
H
C
PB
V
V
HBLKALT_2
H
U
Ma
CL
PB
Se
En
.
Enable HBLK Alternation .
13
r Allows HD Length up to 8191 Pixels.
Un
X
X
X
X
X
X
X
BLKMASK_2
LPOBPOL_2
LKPOL_2
PATSEL_2
MASK_2
DLEN13_2
NUSED
sking Polarity during HBLK. H1 [0], H3 [1].
POB Start Polarity.
LK Start Polarity.
lected Vertical Pattern Group for Vertical Sequence 2.
able Masking of Vertical Outputs (Specified by FREEZE/RESUME Registers)
th Bit for HD Length Counte
used.
91
X
V
V
Number of Selected Vertical Pattern Group Repetitions for Odd Lines.
Nu
[11:0]
[23:12]
X
PATREPO_2
PATREPE_2
mber of Selected Vertical Pattern Group Repetitions for Even Lines.
92
V
H
Sta
HD
[11:0]
[23:12]
X
X
PATSTART_2
DLEN_2
rt Position in the Line for the Selected Vertical Pattern Group.
Line Length (Number of Pixels) for Vertical Sequence 2.
93
PBLKTOG1_2
PBLKTOG2_2
PB
PBLK Toggle Position 2 for Vertical Sequence 2.
[11:0]
[23:12]
X
X
LK Toggle Position 1 for Vertical Sequence 2.
94
[23:12]
X
HBLKTOG1_2
HBLKTOG2_2
HBLK Toggle Position 1 for Vertical Sequence 2.
HBLK Toggle Position 2 for Vertical Sequence 2.
[11:0]
X
95
[11:0]
[23:12]
X
X
HBLKTOG3_2
HBLKTOG4_2
HBLK Toggle Position 3 for Vertical Sequence 2.
HBLK Toggle Position 4 for Vertical Sequence 2.
96
[11:0]
[23:12]
X
X
HBLKTOG5_2
HBLKTOG6_2
HBLK Toggle Position 5 for Vertical Sequence 2.
HBLK Toggle Position 6 for Vertical Sequence 2.
97
[11:0]
[23:12]
X
X
CLPOBTOG1_2
CLPOBTOG2_2
CLPOB Toggle Position 1 for Vertical Sequence 2.
CLPOB Toggle Position 2 for Vertical Sequence 2.
able 61. Vertical Sequence 3 (VSEQ3) Register Map
r Name
Register Description
T
Address
Data Bit Content
Default Value
Registe
98
[1:0]
[2]
[3]
[7:4]
[9:8]
[11:10
[1
[23:12]
]
2]
H
C
PB
V
V
H
HDLEN13_3
U
LK. H1 [0], H3 [1].
CL
PB
Selected Vertical Pattern Group for Vertical Sequence 3.
En
Registers).
En
13
Length Counter Allows HD Length up to 8191 Pixels.
Un
X
X
X
X
X
X
X
BLKMASK_3
Masking Polarity during HB
LPOBPOL_3
LKPOL_3
PATSEL_3
MASK_3
BLKALT_3
NUSED
POB Start Polarity.
LK Start Polarity.
able Masking of Vertical Outputs (Specified by FREEZE/RESUME
able HBLK Alternation
th Bit for HD
used.
99
X
V
V
Nu
Number of Selected Vertical Pattern Group Repetitions for Even Lines.
[11:0]
[23:12]
X
PATREPO_3
PATREPE_3
mber of Selected Vertical Pattern Group Repetitions for Odd Lines.
9A
[11:0]
[23:12]
V
HDLEN_3
Sta
HD Line Length (Number of Pixels) for Vertical Sequence 3.
X
X
PATSTART_3
rt Position in the Line for the Selected Vertical Pattern Group.
9B
[23:12]
X
PB
PBLKTOG2_3
PB
PBLK Toggle Position 2 for Vertical Sequence 3.
[11:0]
X
LKTOG1_3
LK Toggle Position 1 for Vertical Sequence 3.
9C
[11:0]
[23:12]
X
X
H
HBLKTOG2_3
HB
HB
BLKTOG1_3
LK Toggle Position 1 for Vertical Sequence 3.
LK Toggle Position 2 for Vertical Sequence 3.
9D
[11:0]
[23:12]
X
X
HBLKTOG3_3
HBLKTOG4_3
HBLK Toggle Position 3 for Vertical Sequence 3.
HBLK Toggle Position 4 for Vertical Sequence 3.
9E
[11:0]
[23:12]
X
X
HBLKTOG5_3
HBLKTOG6_3
HBLK Toggle Position 5 for Vertical Sequence 3.
HBLK Toggle Position 6 for Vertical Sequence 3.
9F
[11:0]
[23:12]
X
X
CLPOBTOG1_3
CLPOBTOG2_3
CLPOB Toggle Position 1 for Vertical Sequence 3.
CLPOB Toggle Position 2 for Vertical Sequence 3.



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