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LSM6DSOP 数据表(PDF) 62 Page - STMicroelectronics |
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LSM6DSOP 数据表(HTML) 62 Page - STMicroelectronics |
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62 / 107 page ![]() Register description LSM6DSOP 62/107 DocID032926 Rev 5 9.19 CTRL9_XL (18h) Control register 9 (r/w) Table 62. CTRL9_XL register description 9.20 CTRL10_C (19h) Control register 10 (r/w) Table 64. CTRL10_C register description Table 61. CTRL9_XL register 1(1) 1. This bit must be set to '1' for the correct operation of the device. 1(1) 1(1) 0(2) 2. This bit must be set to '0' for the correct operation of the device. 0(2) 0(2) DEVICE_ CONF 0(2) DEVICE_CONF Enables the proper device configuration. Default value: 0 It is recommended to always set this bit to 1 during device configuration. (0: default; 1: enabled) Table 63. CTRL10_C register 0(1) 1. This bit must be set to '0' for the correct operation of the device. 0(1) TIMESTAMP _EN 0(1) 0(1) 0(1) 0(1) 0(1) TIMESTAMP_EN Enables timestamp counter. default value: 0 (0: disabled; 1: enabled) The counter is readable in TIMESTAMP0 (40h), TIMESTAMP1 (41h), TIMESTAMP2 (42h), and TIMESTAMP3 (43h). |
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