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RA4M1 数据表(PDF) 116 Page - Renesas Technology Corp |
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RA4M1 数据表(HTML) 116 Page - Renesas Technology Corp |
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116 / 130 page  R01DS0355EJ0100 Rev.1.00 Page 116 of 130 Oct 8, 2019 RA4M1 Group 2. Electrical Characteristics Figure 2.85 JTAG TCK timing Figure 2.86 JTAG input/output timing Table 2.77 JTAG (debug) characteristics (2) Conditions: VCC = 1.6 to 2.4 V Parameter Symbol Min Typ Max Unit Test conditions TCK clock cycle time tTCKcyc 250 - - ns Figure 2.85 TCK clock high pulse width tTCKH 120 - - ns TCK clock low pulse width tTCKL 120 - - ns TCK clock rise time tTCKr -- 5 ns TCK clock fall time tTCKf -- 5 ns TMS setup time tTMSS 50 - - ns Figure 2.86 TMS hold time tTMSH 50 - - ns TDI setup time tTDIS 50 - - ns TDI hold time tTDIH 50 - - ns TDO data delay time tTDOD - - 150 ns TCK tTCKcyc tTCKH tTCKf tTCKL tTCKr TCK TMS TDI TDO tTMSS tTMSH tTDIH tTDIS tTDOD |
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