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DSPIC33EP64GS708 数据表(PDF) 105 Page - Microchip Technology

部件名 DSPIC33EP64GS708
功能描述  16-Bit Digital Signal Controllers for Digital Power Applications with Interconnected High-Speed PWM, ADC, PGA and Comparators
PDF  484 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

DSPIC33EP64GS708 数据表(HTML) 105 Page - Microchip Technology

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 2016-2018 Microchip Technology Inc.
DS70005258C-page 105
dsPIC33EPXXXGS70X/80X FAMILY
9.0
OSCILLATOR CONFIGURATION
The dsPIC33EPXXXGS70X/80X family oscillator
system provides:
• On-Chip Phase-Locked Loop (PLL) to Boost
Internal Operating Frequency on Select Internal
and External Oscillator Sources
• On-the-Fly Clock Switching between Various
Clock Sources
• Doze mode for System Power Savings
• Fail-Safe Clock Monitor (FSCM) that Detects
Clock Failure and Permits Safe Application
Recovery or Shutdown
• Configuration Bits for Clock Source Selection
• Auxiliary PLL for ADC and PWM
A simplified diagram of the oscillator system is shown
in Figure 9-1.
Note 1: This data sheet summarizes the features
of the dsPIC33EPXXXGS70X/80X family
of devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to “Oscillator Module”
(DS70005131) in the “dsPIC33/PIC24
Family Reference Manual”, which is
available from the Microchip website
(www.microchip.com).
2: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization” in
this data sheet for device-specific register
and bit information.



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