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ADP5014ACPZ-R7 数据表(PDF) 25 Page - Analog Devices

部件名 ADP5014ACPZ-R7
功能描述  Integrated Power Solution with Quad Low Noise Buck Regulators
PDF  34 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP5014ACPZ-R7 数据表(HTML) 25 Page - Analog Devices

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Data Sheet
ADP5014
Rev. A | Page 25 of 34
The ADP5014 uses a transconductance amplifier as the error
amplifier to compensate the system. Figure 40 shows the
simplified peak current-mode control small signal circuit.
RESR
R
+
–
gm
RC
CCP
COUT
CC
RTOP
RBOT
–
+
AVI
VOUT
VCOMP
VOUT
Figure 40. Simplified Peak Current-Mode Control Small Signal Circuit
The compensation components, RC and CC, contribute a zero
and the optional CCP and RC contribute an optional pole.
The closed-loop transfer (TV(s)) equation is as follows:
)
(
1
1
)
(
s
G
s
C
C
C
C
R
s
s
C
R
C
C
g
R
R
R
s
T
vd
CP
C
CP
C
C
C
C
CP
C
m
TOP
BOT
BOT
V
×
×
+
×
×
+
×
×
×
+
×
+
−
×
+
=
The following procedure shows how to select the compensation
components—RC, CC, and CCP,—for ceramic output capacitor
applications.
1. Determine the cross frequency (fC). Generally, fC is between
fSW/12 and fSW/6.
2. RC can be calculated using the following equation:
VI
m
C
OUT
OUT
C
A
g
VSETx
f
C
V
R
×
×
×
×
×
π
×
= 2
3. Place the compensation zero at the domain pole (fP).
CC can be determined as follows:
(
)
C
OUT
ESR
C
R
C
R
R
C
×
+
=
4. CCP is optional. It can be used to cancel the zero caused by
the ESR of the output capacitor.
C
OUT
ESR
CP
R
C
R
C
×
=
POWER DISSIPATION
The total power dissipation in the ADP5014 (PD) simplifies to
PD = PBUCK1 + PBUCK2 + PBUCK3 + PBUCK4
Buck Regulator Power Dissipation
The power dissipation (PLOSS) for each buck regulator includes
power switch conductive losses (PCOND), switch losses (PSW), and
transition losses (PTRAN). Other sources of power dissipation exist,
but these sources are generally less significant at the high output
currents of the application thermal limit.
Use the following equation to estimate the power dissipation of
the buck regulator:
PLOSS = PCOND + PSW + PTRAN
Power Switch Conduction Loss (PCOND)
Power switch conduction losses are caused by the flow of output
current through both the high-side and low-side power switches,
each of which has on resistance (RDS(ON).
Use the following equation to estimate the power switch
conduction loss:
PCOND = (RDS(ON)_HS × D + RDS(ON)_LS × (1 − D)) × IOUT2
where:
RDS(ON)_HS is the high-side MOSFET on resistance.
RDS(ON)_LS is the low-side MOSFET on resistance.
D is the duty cycle (D = VOUT/VIN).
Switching Loss (PSW)
Switching losses are associated with the current drawn by the
driver to turn the power devices on and off at the switching
frequency. Each time a power device gate is turned on or off,
the driver transfers a charge from the input supply to the gate,
and then from the gate to ground. Use the following equation to
estimate the switching loss:
PSW = (CGATE_HS + CGATE_LS) × VIN2 × fSW
where:
CGATE_HS is the gate capacitance of the high-side switch.
CGATE_LS is the gate capacitance of the low-side switch.
fSW is the switching frequency.
Transition Loss (PTRAN)
Transition losses occur because the high-side switch cannot
turn on or off instantaneously. During a switch node transition,
the power switch provides all the inductor current. The source
to drain voltage of the power switch is half the input voltage,
resulting in power loss. Transition losses increase with both
load and input voltage and occur twice for each switching cycle.
Use the following equation to estimate the transition loss:
PTRAN = 0.5 × VIN × IOUT × (tR + tF) × fSW
where:
tR is the rise time of the switch node.
tF is the fall time of the switch node.
Thermal Shutdown
When the ADP5014 operates under a heavy load in a high
ambient temperature, the power loss can cause the junction
temperature to exceed the maximum junction temperature of
125°C. If the junction temperature exceeds 150°C, the regulator
enters thermal shutdown and recovers when the junction
temperature falls below 135°C.



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