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ADP5014ACPZ-R7 数据表(PDF) 24 Page - Analog Devices |
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ADP5014ACPZ-R7 数据表(HTML) 24 Page - Analog Devices |
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24 / 34 page ![]() ADP5014 Data Sheet Rev. A | Page 24 of 34 OUTPUT CAPACITOR SELECTION The selected output capacitor affects both the output voltage ripple and the loop dynamics of the regulator. For example, during load step transients on the output, when the load is suddenly increased, the output capacitor supplies the load until the control loop can ramp up the inductor current, causing an undershoot of the output voltage. The output capacitance required to meet the voltage droop requirement (COUT_UV) is calculated using the following equation: UV OUT OUT IN STEP UV UV OUT V V V L I K C _ 2 _ 2 where: KUV is a factor (typically set to 2). ΔISTEP is the load step. ΔVOUT_UV is the allowable undershoot on the output voltage. Another example of the effect of the output capacitor on the loop dynamics of the regulator is when the load is suddenly removed from the output. The energy stored in the inductor rushes into the output capacitor, causing an overshoot of the output voltage. The output capacitance required to meet the overshoot requirement (COUT_UV) is calculated using the following equation: 2 2 2 _ OUT OUT_OV OUT STEP OV OV OUT V V V L I K C where: KOV is a factor (typically set to 2). ΔISTEP is the load step. ΔVOUT_OV is the allowable overshoot on the output voltage. The output voltage ripple is determined by the equivalent series resistance (ESR) of the output capacitor and its capacitance value. Use the following equation to select a capacitor that can meet the output ripple requirements: RIPPLE OUT SW L RIPPLE OUT V f I C _ _ 8 L RIPPLE OUT ESR I V R _ where: ΔVOUT_RIPPLE is the allowable output voltage ripple. RESR is the ESR of the output capacitor. Select the largest output capacitance given by COUT_UV, COUT_OV, and COUT_RIPPLE to meet both load transient and output ripple requirements. The selected output capacitor voltage rating must be greater than the output voltage. The minimum rms current rating of the output capacitor (ICOUT_rms) is determined by the following equation: ICOUT_rms = 12 L I INPUT CAPACITOR SELECTION The input decoupling capacitor attenuates high frequency noise on the input and acts as an energy reservoir. This capacitor is a ceramic capacitor and must be placed close to the PVINx pins. The loop composed of the input capacitor, the high-side MOSFET, and the low-side MOSFET must be kept as small as possible. The voltage rating of the input capacitor must be greater than the maximum input voltage. The rms current rating of the input capacitor (ICIN_rms)is larger than the following equation: ICIN_rms = IOUT × ) 1 ( D D where D is the duty cycle (D = VOUT/VIN). PROGRAMMING THE UVLO INPUT The precision enable input can be used to program the UVLO threshold of the input voltage, as shown in Figure 32. The precision turn on threshold is 0.6 V. Use the following equations to calculate RTOP_EN and RBOT_EN: RTOP_EN = (0.57 V × VIN_RISING − 0.6 × VIN_FALLING)/(0.57 V × 4 μA − 0.6 × 1 μA) RBOT_EN = (0.6 V × RTOP_EN)/(VIN_RISING – RTOP_EN × 4 μA − 0.6 V) where: RTOP_EN is the resistor from PVINx to ENx. VIN_RISING is the VIN rising threshold. VIN_FALLING is the VIN falling threshold. RBOT_EN is the resistor from ENx to ground. COMPENSATION COMPONENTS DESIGN For the peak current-mode control architecture, the power stage can be simplified as a voltage controlled current source that supplies current to the output capacitor and load resistor. The simplified loop is composed of one domain pole and a zero contributed by the ESR of the output capacitor. The control to output transfer function (Gvd) is shown in the following equations: p z VI COMP OUT vd f s f s R A s V s V G 2 1 2 1 ) ( ) ( ) s ( OUT ESR z C R f 2 1 OUT ESR p C R R f 2 1 where: AVI = 16.67A/V for Channel 1 or Channel 2, and 8.33 A/V for Channel 3 or Channel 4. R is the load resistance. fz is the frequency of the zero. COUT is the output capacitance. RESR is the equivalent series resistance of the output capacitor. fp is the frequency of the pole. |
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