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ADP5014ACPZ-R7 数据表(PDF) 3 Page - Analog Devices

部件名 ADP5014ACPZ-R7
功能描述  Integrated Power Solution with Quad Low Noise Buck Regulators
PDF  34 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP5014ACPZ-R7 数据表(HTML) 3 Page - Analog Devices

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Data Sheet
ADP5014
Rev. A | Page 3 of 34
DETAILED FUNCTIONAL BLOCK DIAGRAM
+
–
UVLO1
PVIN1
SW1
PVIN1
DRIVER
DRIVER
PGND1
0.6V
HICCUP
MODE
+
–
OCP
CLK1
SLOPE
COMP
CLK1
PWRGD1
ZERO
CROSS
+
–
+
–
FREQ
FOLDBACK
+
–
CHANNEL 1 – BUCK
DUPLICATE
CHANNEL 1
CHANNEL 2 – BUCK
CURRENT BALANCE
CURRENT BALANCE
PGND2
PVIN2
SW2
VID1
OVP
LATCH-UP
+
–
EA1
CMP1
OSCILLATOR
FUNCTION
DECODER
AVIN
VREF
HOUSE-KEEPING
LOGIC
ACS1
UVLO
PVIN1
Q1
Q2
0.9
1.15
1µA
3µA
EN_BUF
REF
PVIN3
SW3
PGND3
PGND4
PVIN4
SW4
EN1/ENALL
CLK
DUPLICATE
CHANNEL 3
CHANNEL 4 – BUCK
+
–
+
–
UVLO3
PVIN3
DRIVER
DRIVER
0.6V
HICCUP
MODE
+
–
OCP
CLK3
SLOPE
COMP
CLK3
PWRGD3
ZERO
CROSS
+
–
+
–
FREQ
FOLDBACK
+
–
CHANNEL 3 – BUCK
VID3
OVP
LATCH-UP
+
–
EA3
CMP3
ACS3
PVIN3
Q5
Q6
0.9
1.15
CONTROL LOGIC
AND MOSFET
DRIVER WITH
ANTICROSS
PROTECTION
CONTROL LOGIC
AND MOSFET
DRIVER WITH
ANTICROSS
PROTECTION
NEG CURRENT
CMP
NEG CURRENT
CMP
1µA
3µA
EN_BUF
+
–
COMP1
VSET1
FB1
EN2/DL12
COMP2
VSET2
FB2
RT
CFG1
CFG2
GPIO
EN3/UV
COMP3
VSET3
FB3
EN4/DL34
COMP4
VSET4
FB4
Figure 2.



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