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AM486DX2 数据表(PDF) 1 Page - Advanced Micro Devices |
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AM486DX2 数据表(HTML) 1 Page - Advanced Micro Devices |
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1 / 67 page  This document contains information on a product under development at Advanced Micro Devices. The information is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed product without notice. Advanced Micro Devices DISTINCTIVE CHARACTERISTICS s High-Performance Design — Industry-standard write-back cache support — Frequent instructions execute in one clock — 105.6-million bytes/second burst bus at 33 MHz — Flexible write-through and write-back address control — Advanced 0.35- µ CMOS-process technology — Dynamic bus sizing for 8-, 16-, and 32-bit buses — Supports “soft reset” capability s High On-Chip Integration — 16-Kbyte unified code and data cache — Floating-point unit — Paged, virtual memory management s Enhanced System and Power Management — Stop clock control for reduced power consumption — Industry-standard two-pin System Management Interrupt (SMI) for power management indepen- dent of processor operating mode and operating system — Static design with Auto Halt power-down support — Wide range of chipsets supporting SMM avail- able to allow product differentiation s Complete 32-Bit Architecture — Address and data buses — All registers — 8-, 16-, and 32-bit data types s Standard Features — 3-V core with 5-V tolerant I/O — Available in a 133-MHz version — Binary compatible with all Am486®DX, Am486DX2, and Am486DX4 microprocessors — Wide range of chipsets and support available through the AMD FusionPCSM Program s 168-pin PGA package or 208-pin SQFP package s IEEE 1149.1 JTAG Boundary-Scan Compatibility s Supports Environmental Protection Agency's Energy Star program — 3-V operation reduces power consumption up to 40% — Energy management capability provides excel- lent base for energy-efficient design — Works with a variety of energy-efficient, power- managed devices GENERAL DESCRIPTION The Am5X86™ microprocessor is an addition to the AMD microprocessor product family. The new processor en- hances system performance by raising the microproces- sor operating frequency to the highest levels allowed by current manufacturing technology, while maintaining complete compatibility with the standard Am486 proces- sor architecture and Microsoft® Windows®. The CPUs incorporate write-back cache, flexible clock control, and enhanced SMM. Table 1 shows available processors in the Am5X86 microprocessor family. The Am5X86 microprocessor family allows write-back configuration through software and cacheable access control. On-chip cache lines are configurable as either write-through or write-back. The CPU clock control fea- ture permits the CPU clock to be stopped under con- trolled conditions, allowing reduced power consumption during system inactivity. The SMM function is implement- ed with an industry standard two-pin interface. Table 1. Clocking Options Operating Frequency Input Clock Available Package 133 MHz 33 MHz 168-pin PGA 133 MHz 33 MHz 208-pin SQFP PRELIMINARY Am5X86™ Microprocessor Family Publication # 19751 Rev: C Amendment/0 Issue Date: March 1996 |
类似零件编号 - AM486DX2 |
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类似说明 - AM486DX2 |
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