C5C5EDELTA-RMSLASHD datasheet(43/114 Pages) NXP

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Pin Descriptions Grouped by Function

Executive Processor

System Interface Signals

The XP’s system interface manages the supervisory controls for the network interfaces, as

well as the set of pins that provide interfaces to other components in the system that are

not memories or network interfaces. It is also the primary interface used for initializing the

C-3e NP after reset. The XP signals include PCI signals, Serial interface signals, and PROM

interface signals.

PCI Signals

The PCI can be configured to support a 32bit PCI capable of operating at either 33MHz or

66MHz. The PCI is fully compliant with PCI Specification revision 2.1. Table 15 describes

the PCI signals.

Table 15 PCI Signals

SIGNAL NAME

PIN #

TOTAL

TYPE

I/O

SIGNAL DESCRIPTION

PAD0 - PAD31

AB9, AC9, AE9, AF9, AB8, AC8,

AD8, AE8, AF8, AG8, AB7, AC7,

AD7, AE7, AF7, AG7, AB6, AC6,

AE6, AG6, AB5, AC5, AD5, AE5,

AF5, AG5, AB4, AD4, AF4, AG4,

AA3, AB3,

PCI

I/O

Multiplexed Address/Data Bus. These signals are

multiplexed address and data bits. The C-3e NP

receives addresses as target and drives addresses as

master. It drives the data and receives read data as

master.

PCBEX0 - PCBEX3

AB2, AG3, AF3, AE3

PCI

I/O

Command byte enables. These signals are

multiplexed command and byte enabled signals.

The C-3e NP receives byte enables as target and drives

byte enables as master.

PPAR

AG1

PCI

I/O

Parity. This signal carries even parity for AD and CBE#

pins. It has the same receive and drive characteristics

as the address and data bus, except that it is one PCI

cycle later.

PFRAMEX

AA7

PCI

I/O

Cycle frame

PTRDYX

AB1

PCI

I/O

Target ready for data transfer

PIRDYX

AC2

PCI

I/O

Initiator ready for data transfer

PSTOPX

AE2

PCI

I/O

Target transaction stop request

PDEVSELX

AG2

PCI

I/O

Target device selected

PPERRX

AC3

PCI

I/O

Bus parity error

PSERRX

AD3

PCI

I/O

System error

PCLK

AF1

Bus clock

PRSTX

AE1

PCI

Bus reset

PREQX

AD1

PCI

Initiator bus request (arbitration)

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

C5C5EDELTA-RM/D 数据表(PDF) 43 Page - NXP Semiconductors

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