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C5C5EDELTA-RM/D 数据表(PDF) 82 Page - NXP Semiconductors

部件名 C5C5EDELTA-RM/D
功能描述  C-3e Network Processor Silicon Revision A1
PDF  114 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

C5C5EDELTA-RM/D 数据表(HTML) 82 Page - NXP Semiconductors

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CHAPTER 3: ELECTRICAL SPECIFICATIONS
C3EN
10/100 Ethernet Timing Specifications
The 10/100 Ethernet interface timing is shown in Figure 15 and described in Table 39.
Figure 15 10/100 Ethernet Timing Diagram
Tcds
DS1/DS3 Setup Time
2.0
ns
Tcdh
DS1/DS3 Hold Time
0
ns
Table 38 DS1/DS3 Ethernet Timing Description (continued)
SYMBOL
PARAMETER
MIN
TYP
MAX
UNIT
CPn_0 (TCLK)
Cycle 1
Cycle 2
Cycle 3
Cycle 4
Cycle 5
CPn_2/3/6 (Tx)
CPn_1/4/5 (Rx)
Tcet
Tceo
Tces
Tceh
Table 39 10/100 Ethernet Timing Description
SYMBOL
PARAMETER
MIN
TYP
MAX
UNIT
Tcet
Transmit Cycle Time*
* STD/Fast Ethernet
20
ns
Tceo
Output Time
3.0
15.0
ns
Tces
Setup Time
2.0
ns
Tceh
Hold Time
0
ns
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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