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C5C5EDELTA-RM/D 数据表(PDF) 79 Page - NXP Semiconductors |
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C5C5EDELTA-RM/D 数据表(HTML) 79 Page - NXP Semiconductors |
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79 / 114 page  AC Timing Specifications 79 03 AC Timing Specifications AC timing specifications consist of input requirements and output responses. The input requirements include setup and hold times, pulse widths, and high and low times. The output responses include delays from clock to signal. The AC timing specifications are defined separately for each interface to the C-3e NP. See Figure 12. Output timing specifications for LVTTL pins are given with a 20pF load on the output. Other loads can be simulated with the IBIS model available from Motorola. The LVPECL driver is specified into a 50 Ω load terminated to a (VDD33 - 2V) reference. Figure 12 Test Loading Conditions +2V LVTTL LVPECL DUT DUT 20pF 50 Ω VDD33 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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